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Though hopefully not some of us all of the time. Randomization is a technique used in verification to improve coverage in testing. You develop tests you know you have to run, then you throw randomization on top of that to search around those starter tests, to explore possibilities you haven’t considered. Truly random tests are not… Read More
Again on the theme of rationalizing NVIDIA’s $40B acquisition of Arm, two more hot areas for growth are mobility and industrial automation markets. NVIDIA is already strong in intelligent mobility and Arm is is virtually everywhere in the modern car. Ditto for robotics in industry. In fact the two domains have significant overlap:… Read More
I’ve covered Arm Neoverse updates a few times already, a span of products with application from the cloud through infrastructure to the edge. Logical strategy of course but Arm has been delivering some impressive wins suggesting this is more than just a loose marketing concept. Overlap with NVIDIA in datacenters and supercomputing… Read More
I wasn’t familiar with Veriest, I’m guessing you may not be either. They are a design and verification services company based in the Tel Aviv area (Israel). The CEO, Moshe Zalcberg, was earlier GM for Cadence in Israel. Echoes for me of the early days working with Ajoy Bose in Interra. Veriest have a big emphasis in verification, for… Read More
The idea of a digital twin is simple enough. You use a digital model of a car, aircraft, whatever to test design ideas and prove your design will be robust across a wide range of scenarios before you commit millions of dollars and lives to proving out the real thing. As Siemens have accomplished in their PAVE360 platform. There are a … Read More
SSD memory is enjoying a new resurgence in datacenters through NVMe. Not as a replacement for more traditional HDD disk drives, which though slower are still much cheaper. NVMe storage has instead become a storage cache between hot DRAM memory close to processors and the “cold” HDD storage. I commented last year on why this has become… Read More
A checker tripped in verification. Is there a bug trace minimization technique to simplify manual debug? Paul Cunningham (GM, Verification at Cadence), Jim Hogan and I continue our series to highlight all the great research that’s out there in verification. Feel free to comment.
This month’s pick is Simulation-Based… Read More
Cadence has clearly found its groove with Intelligent System Design, something that Lip-Bu reinforced in the CadenceLIVE kickoff keynote on Tuesday, August 11th. Anirudh Devgan, president of Cadence, continued to discuss the theme in his keynote on Wednesday, August 12th with his equally consistent subtitle—”Strength… Read More
Based on press coverage and technical paper volume, you could be forgiven for thinking that Korea had decided to take a pass on AI mania, or maybe just to dabble a little here and there to stay abreast of trends. But you’d be wrong. Korea is very active in AI; they don’t feel a need to trumpet what they’re doing from the rooftops. If you … Read More
It’s no secret that innovation in AI chip architectures is on a tear. When you put together the spatial complexity of highly parallelized algorithms with the need to localize memory accesses on-chip to the greatest extent possible, we’re seeing a proliferation of all kinds of domain-specific architectures. Which in the normal… Read More
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Selling the Forges of the Future: U.S. Report Exposes China’s Reliance on Western Chip Tools