Almost everything that we do in chip design and verification was invented to raise the abstraction above schematics and polygons. Register-transfer-level (RTL) design, functional simulation, logic synthesis, floorplanning, and more fall into this category. Even the notion of binary circuits is an abstraction. Underneath… Read More
Author: Anupam Bakshi
The Inconvenient Truth of Clock Domain Crossings
Visit with Agnisys at DAC 2023 in San Francisco July 10-12
I’d like to extend an invitation to you and your development team to visit with Agnisys in our booth, #2512, at this week’s Design Automation Conference (DAC) 2023, Monday, July 10-12.
In its 60th year, DAC is recognized as the premier event for the design and design automation of electronic chips to systems, so you can count on team… Read More
Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools