The next generation of electronic systems starts with conversations between people solving difficult design challenges. For companies developing EDA tools, semiconductor IP, design services, and supporting technologies, DAC 2027 offers an opportunity to turn those conversations into customer relationships, partnerships,… Read More
Author: Admin
Bring Your Innovation to Silicon Valley at DAC 2027
Golden Testcases You Can Check With a Calculator
Two timing tools that agree can still both be wrong. A small testcase where you can re-derive every printed digit by hand shows that the engine is correct, and when it isn’t, it shows which term is wrong.
By Dr. Sameer Pawanekar, Founder & CEO, Ramtera Inc.
The problem: agreement is not correctness
New static timing engines, and… Read More
Curvilinear OPC and next-gen photomask optimization
A vector-based approach for semiconductor manufacturing
By Sagar Saxena is a Senior Product Engineer at Siemens EDA
Curvilinear OPC transforms advanced semiconductor manufacturing
Modern semiconductor manufacturing is experiencing a fundamental shift in the way photomasks are created and optimized. As the industry pushes… Read More
Generating Chip Subsystems Automatically: A New Answer to Manage Chip Design Complexity
By Defacto Staff
Today’s chips are no longer just processors, they are entire systems. A System-on-Chip (SoC) brings together CPU clusters, accelerators, memories, interconnects and dozens of peripherals, often coming from many different teams and vendors. With AI, high-performance computing and IoT driving demand for … Read More
Reimagining 3D IC Design: From Architecture to Signoff
By Keith Felton, Andras Vass-Varnai and Todd Burkholder, Siemens EDA
The semiconductor industry is undergoing a fundamental transformation. Heterogeneous integration, the practice of combining multiple chiplets and specialized components into a single advanced packaging platform, has emerged as a powerful alternative… Read More
Agentic AI accelerates 3D IC engineering for the AI factory era
By Sudarshan Deo, software R&D Manager for 3D IC, Siemens
What if you could completely rethink what an EDA workflow looks like for the increasingly complex 3D ICs powering the next generation of AI factories? Siemens’ expanded agentic AI portfolio is automating the hardest parts of 3D IC engineering.
At NVIDIA GTC Berlin 2026,… Read More
When Nanomagnets Do the Math: France’s New Machine for Impossible Choices
French researchers have demonstrated a hybrid nanoelectronic “Ising machine” designed to solve difficult combinatorial optimization problems more efficiently. The experimental system combines two emerging device technologies—resistive memory and spintronics—to perform parts of an optimization algorithm through… Read More
SEMICON West’s Autonomous Fab Vision Needs a Decision-Escalation Design
By Gleb Tsipursky
SEMICON West 2026’s smart-manufacturing agenda connected digital twins, agentic AI, physical AI, and increasingly autonomous factory operations. The final day included a session on automation and equipment for autonomous facilities. At its October CONNECT conference, PDF Solutions planned demonstrations… Read More
Who Gets to Move the Recipe? How Autonomous Agents Earn Decision Authority in the Fab
by Ajay Kumar Govindaram
There’s a question I’ve started asking at every agentic AI demo I sit through, and it has a clean answer in every fab on earth: who is allowed to change the recipe? In a semiconductor factory, that was settled decades ago. A person doesn’t touch a production recipe because they feel confident.… Read More
Rethinking Phase Jitter: An Algorithmic Approach to Signal Integrity
Byline: Richard Shreiner
Modern semiconductor architectures are pushing the absolute limits of physical scaling. As data rates climb into sub-picosecond regimes across high-performance computing, 5G/6G infrastructure, and advanced AI clusters, physical layer (Layer 1) signal integrity has shifted from an engineering… Read More









The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival