Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing

Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing
by Admin on 07-22-2025 at 10:00 am

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By Tetsu Ho

With the ever-increasing global demand for smarter, faster electronic systems, the semiconductor industry faces a dual challenge: delivering high-performance memory while reducing environmental impact. Winbond is meeting this challenge head-on by embedding sustainability into every layer of its operations—from… Read More


Protecting Sensitive Analog and RF Signals with Net Shielding

Protecting Sensitive Analog and RF Signals with Net Shielding
by Admin on 07-21-2025 at 6:00 am

fig1 net shielding 72dpi

By Hossam Sarhan

Communication has become the backbone of our modern world, driving the rapid growth of the integrated circuit (IC) industry, particularly in communication and automotive applications. These applications have increased the demand for high-performance analog and radio frequency (RF) designs.

However, designing… Read More


Improve Precision of Parasitic Extraction for Digital Designs

Improve Precision of Parasitic Extraction for Digital Designs
by Admin on 07-15-2025 at 10:00 am

fig1 pex process

By Mark Tawfik

Parasitic extraction is essential in integrated circuit (IC) design, as it identifies unintended resistances, capacitances, and inductances that can impact circuit performance. These parasitic elements arise from the layout and interconnects of the circuit and can affect signal integrity, power consumption,… Read More


Rethink Scoreboards to Supercharge AI-Era CPUs

Rethink Scoreboards to Supercharge AI-Era CPUs
by Admin on 07-01-2025 at 6:00 am

Register (1)

By Dr. Thang Minh Tran, CEO/CTO Simplex Micro

Today’s AI accelerators—whether built for massive data centers or low-power edge devices—face a common set of challenges: deep pipelines, complex data dependencies, and the high cost of speculative execution. These same concerns have long been familiar in high-frequency microprocessor… Read More


Jitter: The Overlooked PDN Quality Metric

Jitter: The Overlooked PDN Quality Metric
by Admin on 06-30-2025 at 6:00 am

Figure 1 – Accumulated jitter

Bruce Caryl is a Product Specialist with Siemens EDA

The most common way to evaluate a power distribution network is to look at its impedance over the effective frequency range. A lower impedance will produce less noise when transient current is demanded by the IC output buffers. However, this transient current needs to be provided… Read More


Legacy IP Providers Struggle to Solve the NPU Dilemna

Legacy IP Providers Struggle to Solve the NPU Dilemna
by Admin on 06-11-2025 at 10:00 am

Fracture the IO Network

At Quadric we do a lot of first-time introductory visits with prospective new customers.  As a rapidly expanding processor IP licensing company that is starting to get noticed (even winning IP Product of the Year!) such meetings are part of the territory.  Which means we hear a lot of similar sounding questions from appropriately… Read More


Relaxation-Aware Programming in ReRAM: Evaluating and Optimizing Write Termination

Relaxation-Aware Programming in ReRAM: Evaluating and Optimizing Write Termination
by Admin on 06-03-2025 at 6:00 am

Im1 Weebit Relaxation Aware Programming in ReRAM Optimizing Write Termination RRAM 1024x704

Resistive RAM (ReRAM or RRAM) is the strongest candidate for next-generation non-volatile memory (NVM), combining fast switching speeds with low power consumption. New techniques for managing a memory phenomenon called ‘relaxation’ are making ReRAM more predictable — and easier to specify for real-world applications.… Read More


EDA AI agents will come in three waves and usher us into the next era of electronic design

EDA AI agents will come in three waves and usher us into the next era of electronic design
by Admin on 05-15-2025 at 10:00 am

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Author: Niranjan Sitapure, AI Product Manager, Siemens EDA

We are at a pivotal point in Electronic Design Automation (EDA), as the semiconductors and PCB systems that underpin critical technologies, such as AI, 5G, autonomous systems, and edge computing, grow increasingly complex. The traditional EDA workflow, which includes… Read More


Safeguard power domain compatibility by finding missing level shifters

Safeguard power domain compatibility by finding missing level shifters
by Admin on 05-14-2025 at 10:00 am

fig1 missing level shifters

In the realm of mixed signal design for integrated circuits (ICs), level shifters play a critical role for interfacing circuits that operate at different voltage levels. A level shifter converts signal from one voltage level to another, ensuring compatibility between components. Figure 1 illustrates a missing level shifter… Read More


Metal fill extraction: Breaking the speed-accuracy tradeoff

Metal fill extraction: Breaking the speed-accuracy tradeoff
by Admin on 05-12-2025 at 10:00 am

fig1 metal fill

As semiconductor technology scales and device complexity increases, accurately modeling the parasitic effects of metal fill has become critical for circuit performance, power integrity, and reliability. Metal fill is a crucial part of the manufacturing process, ensuring uniform layer density, improving planarization,… Read More