Navigating Edge AI Architectures: Power Efficiency, Performance, and Future-ProofingThe surge in Edge AI applications has propelled…Read More
Cadence Integrates Power Integrity Analysis and Fix into DesignAs integration levels increase, clock frequencies rise, and…Read More
Webinar: Silicon Catalyst & EE Times Examine the Bigger Picture Aspects of AI – Nov. 29, 2023 – 9am to 10am PacificArtificial Intelligence (AI) is dominating the news cycle…Read More
AMAT- Facing Criminal Charges for China Exports - Overshadows OK Quarter- News that AMAT facing criminal charges for…Read More
I first met Prabhu Goel at Wang Labs in 1982, then Prabhu and Phil Moorby went on to create Verilog at Gateway Design Automation in the early 80s, and finally their company was acquired by Cadence in 1990. Cadence created Open Verilog International (OVI) in 1991, transferring the language to the public domain, and then the IEEE created… Read More
Printed Circuit Boards (PCBs) are the foundation of modern electronics, and designing them efficiently is complex. Design automation and advanced PCB routing have transformed the process, making it faster and more reliable. Design automation streamlines tasks, reduces errors, and ensures consistency. Advanced PCB routing… Read More
Formal methods offer completeness in proving functionality but are difficult to scale to system level without abstraction and cannot easily incorporate system aspects outside the logic world such as in cyber-physical systems (CPS). Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst,… Read More
This webinar looks at the challenges a Design Engineer could face, such as when various IP blocks within an SoC are required to work in different clock domains to satisfy the power constraints.
Abstract:
Various IP blocks within an SoC are often required to work in different clock domains in order to satisfy the power constraints.… Read More
According to McKinsey & Company, a digital twin is a digital representation of a physical object, person, or process, contextualized in a digital version of its environment. Digital twins can help an organization simulate real situations and their outcomes, ultimately allowing it to make better decisions. Anyone… Read More
Last week Synopsys announced their next step in generative AI (GenAI) in Synopsys.ai Copilot based on a collaboration with Microsoft. This integrates Azure OpenAI together with existing Synopsys.ai GenAI capabilities to extend Copilot concepts to the EDA world. For those of you unfamiliar with Copilot, this is a development… Read More
Hyperscale data centers are evolving rapidly to meet the demands of high-bandwidth, low-latency applications, ranging from AI and high-performance computing (HPC) to telecommunications and 4K video streaming. The increasing need for faster data transfer rates has prompted a scaling of Ethernet from 51Tb/s to 100Tb/s. Numerous… Read More
Dan is joined by Dave Fick, co-founder and CEO of Mythic. Dave leads Mythic to bring groundbreaking analog computing to the AI inference market. With a PhD in Computer Science & Eng from Michigan, he brings a wealth of knowledge and expertise to the industry.
Dan explores Mythic’s unique analog computing capability … Read More
Dr. Meghali Chopra is co-founder and CEO of SandBox Semiconductor. She is responsible for SandBox’s vision and strategy and oversees the development of SandBox’s software products and technologies. Dr. Chopra received her PhD in Chemical Engineering from the University of Texas at Austin where her research focused … Read More
In the complex world of silicon design, ensuring the accuracy and reliability of our designs is paramount. As our chips become more sophisticated, the process of bug hunting—identifying and rectifying errors in our designs—becomes even more critical. Generative AI has the potential to revolutionize the silicon design industry… Read More
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China’s hoard of chip-making tools: national treasures or expensive spare parts?