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Podcast EP236: Why Comprehensive Development Support for AI/ML is Important with Clay Johnson

Podcast EP236: Why Comprehensive Development Support for AI/ML is Important with Clay Johnson
by Daniel Nenni on 07-19-2024 at 10:00 am

Dan is joined by Clay Johnson, CEO of CacheQ. Clay has decades of executive experience in computing, FPGAs and development flows, including serving as Vice President of the Xilinx Spartan Business Unit which was acquired by AMD.

Clay discusses the changes occurring in system design to leverage AI/ML and technologies such as large… Read More


CEO Interview: Orr Danon of Hailo

CEO Interview: Orr Danon of Hailo
by Daniel Nenni on 07-19-2024 at 6:00 am

Orr Danon CEO Hailo

Orr Danon is the CEO and Co-Founder of Hailo. Prior to founding Hailo, Orr spent over a decade working at a leading IDF Technological Unit. During this time he led some of the largest and most complex interdisciplinary projects in the Israeli intelligence community. For the projects he developed and managed, Danon received the … Read More


Has ASML Reached the Great Wall of China

Has ASML Reached the Great Wall of China
by Claus Aasholm on 07-19-2024 at 6:00 am

ASML Holdings 2024

Is it time to abandon the ASML stock?

The first tool company to report Q2-24 results is ASML, and the lithography leader delivered a result above the guidance of EUR5.95B. Revenue of EUR6.242B is 4.9% above guidance and 18% above last quarter’s result of EUR5.29B.

Both operating profit and gross profit grew but not to the level of … Read More


Blue Cheetah at #61DAC

Blue Cheetah at #61DAC
by Daniel Payne on 07-18-2024 at 10:00 am

blue cheetah 61dac min

At #61DAC, I love it when an exhibitor booth uses a descriptive tagline to explain what they do, like when the Blue Cheetah booth displayed Advancing Chiplet Interconnectivity. Immediately, I knew that they were an IP provider focusing on chiplets. I learned what sets them apart is how customizable their IP is to support specific… Read More


The China Syndrome- The Meltdown Starts- Trump Trounces Taiwan- Chips Clipped

The China Syndrome- The Meltdown Starts- Trump Trounces Taiwan- Chips Clipped
by Robert Maire on 07-18-2024 at 8:00 am

China Syndrome
  • The chip industry got a double tap of both China & Taiwan concerns
  • Bloomberg reported the potential for draconian China chip restrictions
  • Trump threw Taiwan under the bus demanding “protection money”
  • Over-inflated chip stocks had a “rapid unscheduled disassembly”
US looking to further restrict
Read More

Evolution of Prototyping in EDA

Evolution of Prototyping in EDA
by Daniel Nenni on 07-18-2024 at 6:00 am

Picture I

As AI and 5G technologies burgeon, the rise of interconnected devices is reshaping everyday life and driving innovation across industries. This rapid evolution accelerates the transformation of the chip industry, placing higher demands on SoC design. Moore’s Law indicates that while chip sizes shrink, the number of… Read More


How Sarcina Revolutionizes Advanced Packaging #61DAC

How Sarcina Revolutionizes Advanced Packaging #61DAC
by Mike Gianfagna on 07-17-2024 at 10:00 am

DAC Roundup – How Sarcina Revolutionizes Advanced Packaging

 

#61DAC was buzzing with discussion of chiplet-based, heterogeneous design.  This new design approach opens new opportunities for applications such as AI, autonomous driving and even quantum computing. A critical enabler for all this to work is reliable, cost-effective advanced packaging, and that is the topic of … Read More


Accelerating Analog Signoff with Parasitics

Accelerating Analog Signoff with Parasitics
by Bernard Murphy on 07-17-2024 at 6:00 am

Quantus Insight min

An under-appreciated but critical component in signing off the final stage of chip design for manufacture is timing closure – aligning accurate timing based on final physical implementation with the product specification. Between advanced manufacturing processes and growing design sizes, the most important factors determining… Read More


Scientific Analog at #61DAC

Scientific Analog at #61DAC
by Daniel Payne on 07-16-2024 at 10:00 am

Scientific Analog 61dac min

Transistor-level circuit designers have long used SPICE for circuit simulation, mostly because it is silicon accurate and helps them to predict the function, timing, power, waveforms, slopes and delays in a cell before fabrication. RTL designers use digital simulators that have a huge capacity but are lacking analog modeling.… Read More


PCIe design workflow debuts simulation-driven virtual compliance

PCIe design workflow debuts simulation-driven virtual compliance
by Don Dingee on 07-16-2024 at 6:00 am

PCIe classical workflow

PCIe design complexity continues rising as the standard for intrasystem communication evolves. An urgent need for more system bandwidth drives PCIe interconnects to multi-lane, multi-link, multi-level signaling. Classical PCIe design workflows leave designers with most of the responsibility for getting the requisite… Read More