Sometimes a Solver is a Suitable Solution

Traditional, rule based, RC extractors rely on a substantial base of assumptions, which are increasingly proving unreliable. Having accurate RC extraction results for parasitic R’s and C’s is extremely important for ensuring proper circuit operation and for optimizing performance and power. Advanced process nodes are making it more difficult to get sufficiently accurate parasitics using rule based extractors. The problem is twofold, the design data given to the extractor is looking less and less like the actual fabricated physical design, and using rules is becoming less accurate due to increasingly complex structures in the circuits. These problems are occurring in BEOL and MEOL.

During a webinar in March, Dr. Garrett Schlenvogt at Silvaco gave some examples of the divergence between rules based extraction and the more accurate solver based approach. Using a ring oscillator, Garrett showed how, as metal structures become more complex, simulated delays diverged from measurement and solver based delays. The figure below illustrates this.

Another point that Garrett made during the webinar is that the 3D geometry to be analyzed needs to match the results from the fabrication process, not just the idealized 3D extrapolation of the 2D layout. He outlined the many factors that need to be considered. In advanced designs there are multiple dielectrics and metals. The geometries are not nicely stratified and metals frequently are not planar. In addition, the metal cross sections are not rectangular. The image below gives an idea of the complexity of fabricated 3D structures.

Clearly a solver cannot be used on large designs, but there are many cases where it can be used not just at the device level, but also at the circuit level. Using a simple step by step sequence, each step in the fabrication process is described and then applied to the mask information. Users can toggle between precise physical modeling or a simplified final representation, depending on accuracy requirements.

The output of Victory Process is passed to Victory Mesh for meshing. For non TCAD users it’s easy enough to take the interconnect portion of the design into Clever 3D, their Field Solver based extraction tool. This will produce a netlist including parasitics suitable for SPICE simulation. This provides a flow that is much easier to deploy than a classic TCAD approach, but gives the benefits of extremely high accuracy.

Because their modeling of physical fabrication steps is comprehensive, there are applications for this flow in many other domains besides FinFET/CMOS. Garrett touched on TFT/LCD/OLED, power devices such as DMOS/IGBT/SiC/GaN, optical, and even rad-hard applications. Another of his examples showed a conformal metal interconnect modeled with and without 3D considerations. The figure below shows the difference in the resistance value results.

During the webinar Garrett mentioned several interesting applications that can benefit from accurate RC extraction. One of these was MEMS capacitors. Another application he highlighted was CCD sensors. Garrett closed with an example containing a memory cell. Along with the parasitics, Silvaco generates a 3D model that can be viewed to ensure the processing steps are properly defined and that the resulting structure is correct.

For engineers looking for the most accurate results, field solver based extraction is the first choice. A field solver based extractor can also be used to verify a rule based approach. However, for full chip and high capacity designs a rule based approach will be needed. The entire webinar, with much more information than we could cover here, is available on the Silvaco website.