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Podcast EP234: An Update on Chips and Science Act Progress with Mike O’Brien

Podcast EP234: An Update on Chips and Science Act Progress with Mike O’Brien
by Daniel Nenni on 07-05-2024 at 10:00 am

Dan is joined by Mike O’Brien. Mike was recently the vice president of aerospace and government at Synopsys, He has 40 years of experience in the semiconductor, software and computer industries. In his 27 years in EDA and IP at Synopsys and Cadence, Mike helped build new lines of business including outsourced design services, research collaborations and a government focused vertical.

Currently, Mike is part of a team working for the US Department of Commerce that will play a key role to implement the CHIPS and Science Act’s historic investments in the semiconductor industry. He joined us in March for an overview of how the government is managing funding for manufacturing and R&D.

Mike returns to provide an update on progress and plans since his last Semiconductor Insiders podcast. He reviews details of funding work with organizations both large and small. The focus of the funding and results are discussed.

Mike also provides details about the work being done to address the talent shortage in the semiconductor industry, both from direct work with universities as well as collaboration with organizations across the ecosystem. Methods to reach across borders in the interest of a worldwide semiconductor ecosystem are also discussed.

Mike concludes with his views of what will be achieved in the coming months.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group or individual.


CEO Interview: David Heard of Infinera

CEO Interview: David Heard of Infinera
by Daniel Nenni on 07-05-2024 at 6:00 am

DavidHeard

David Heard has served as CEO and has been a member of the Board of Directors since November 2020. Mr. Heard joined Infinera in June 2017 and served as our Chief Operating Officer from October 2018 to November 2020. During his time as COO, Mr. Heard was responsible for leading the innovation of new solutions and the overall operational excellence of the company, overseeing functions including corporate development, facilities, human resources, information technology, marketing, operations, product lifecycle management, quality, research and development and services.

Mr. Heard brings a proven track record of technology industry leadership, with more than 25 years of success in the industry. Prior to Infinera, Mr. Heard served as President of Network and Service Enablement at JDS Uniphase from 2010 to 2015, and as COO at BigBand Networks (now Arris) from 2007 to 2010. Earlier roles included President and Chief Executive Officer (CEO) at Somera (now Jabil), President and General Manager, Switching Division, at Tekelec (now Oracle), President and CEO at Santera Systems, and various positions at Lucent Technologies and AT&T.

Tell us about your company?
Infinera is a U.S.-based manufacturer of optical semiconductors and high-speed connectivity solutions for communications service providers, webscalers, and various industry verticals including government, energy, and healthcare. We build, sell, and deploy optical systems and subsystems that transport large amounts of data across fiber optic networks from shorter-reach metropolitan networks through ultra-long-haul and submarine networks. Our solutions provide the backbone for the internet, cloud services, and data center interconnect, and enable services such as 5G mobility, artificial intelligence, streaming video, and high-speed broadband. As part of delivering innovative, industry-leading solutions, Infinera owns and operates a U.S.-based compound semiconductor fab as well as an advanced testing and packaging facility.

What problems are you solving?
Bandwidth demands have been growing at more than 30% per year for more than 20 years. Infinera has been instrumental in helping network operators to cost-effectively keep up with the relentless growth in bandwidth. Leveraging our unique vertically integrated capabilities, Infinera has consistently provided innovative, flexible, and scalable solutions that increase capacity per fiber while driving down cost and power per bit.

What application areas are your strongest?
Infinera specializes in cost-effective scalable optical connectivity solutions. We focus on higher-capacity solutions capable of transmitting multiple terabits of data across all network applications, from intra-data center through ultra-long haul and submarine.

 What keeps your customers up at night?
Cost-effectively keeping up with their bandwidth demands, including rapidly growing demands between data centers driven by explosive applications such as artificial intelligence. Our customers also operate in highly competitive environments, driving the need to consistently provide differentiated service offerings.

What does the competitive landscape look like and how do you differentiate?
This is a growing field that is confronting the unprecedented operational challenges associated with the impact of AI workloads. There are traditional suppliers of optical networking gear focused on addressing this problem, as well as networking companies that can leverage a whole new ecosystem of optical pluggable technology. The environment remains extremely competitive, with the importance of vertical integration and performance leadership being critical to winning customers. Solutions providers need to consistently invest and innovate to bring new technologies and solutions to market that provide incremental benefits to network operators.

What new features/technology are you working on?
We continue to leverage our unique vertical integration capabilities, including our expertise in semiconductor material sciences, to bend the laws of physics to provide the Moore’s Law of economic scalability to critical network infrastructure. Our solutions and technologies are enabled by our U.S.-based semiconductor fab and our advanced test and packaging facility. We are currently bringing to market solutions that enable transmission of 800 Gb/s in a power-efficient pluggable form factor, 1.2 Tb/s in a high-performance embedded solution, and 1.6 Tb/s in an ultra-low-power, short-reach intra-data center solution.

How do customers normally engage with your company?
Networking solutions are typically large and complex deployments. As a result, we work closely with our customers to choose the right technology, optimize network designs, and deploy networks.

Our website is https://www.infinera.com/. We can be reached through our contact page: https://www.infinera.com/contact-us/. Our LinkedIn is https://www.linkedin.com/company/infinera/.

Also Read:

CEO Interview: Dr. Matthew Putman of Nanotronics

CEO Interview: Dieter Therssen of Sigasi

CEO Interview: Dr. Nikos Zervas of CAST


CEO Interview: Dr. Matthew Putman of Nanotronics

CEO Interview: Dr. Matthew Putman of Nanotronics
by Daniel Nenni on 07-04-2024 at 6:00 am

MP1 T4A9487 smoothed V3 cropped

Dr. Matthew Putman is an American scientist, educator, musician, and film/stage producer. He is best known for his work in nanotechnology. Putman currently serves as the CEO of Nanotronics, an advanced machines and intelligence company that has redefined factory control through the invention of a platform that combines AI, automation, and sophisticated imaging to assist human ingenuity in detecting flaws in manufacturing. He recently built New York State’s first high-tech manufacturing hub, located in Building 20 of the Brooklyn Navy Yard.

Matthew has published over 30 papers and is an inventor on over 50 patent applications filed in the U.S. and other countries for his work on manufacturing, automation, inspection, instrumentation, super-resolution, and artificial intelligence. He is an expert in quantum computing and a founding member of The Quantum Industry Coalition. His groundbreaking inventions in manufacturing include the development of the world’s most advanced inspection instrument, which combines super-resolution, AI, and robotics.

Tell us about your company?
We have been in business for 14 years with the purpose of utilizing the latest in computation, especially advanced AI, to bring efficiencies to fabs. It has been a great journey as technology, in general, has improved. We manufacture our own imaging and analysis equipment to provide insights on defectivity and flaws in processes. Now, we use generative AI itself in factories to optimize recipes on production equipment. What was feedback to users is now feedback to the equipment itself. This has led us to our most ambitious endeavor, which is to take these technologies, package them in a modular fab, and deliver them around the world. This is Cubefabs.

A Cubefab can be in full operation in one year from the time of groundbreaking to full production and is a fraction of the price and size of a traditional fab. This has many advantages, and we are seeing interest from the semiconductor industry, as well as from countries and industrial groups that have not been able to enter the semiconductor market. Most importantly, I believe the first products that will come from a Cubefab are power devices that provide greater energy efficiency than anything else available. For applications in data centers and electric vehicles, this helps accelerate two of the largest growing markets with the largest need for efficiencies that they can’t get elsewhere. Cubefabs are democratizing fabs, as well as having a model that allows for regional independence, avoiding geopolitical risk.

What problems are you solving
We are addressing challenges in factories? by improving yields and producing devices with better energy efficiency. We envision a world where we can make rapid progress in the generative AI revolution by using AI to actually build. This offers a new perspective on imaging supply chains and the ability to produce quickly with the most innovative materials.

In which application areas are you strongest?
In our inspection and process control business, we serve a broad spectrum of applications, spanning from traditional silicon fabs to genomics and biotechnology. Additionally, we drive the adoption of emerging technologies like Quantum computing and advanced materials such as graphene. With a primary focus on compound semiconductors, we leverage our extensive data repository to develop AI systems that empower Cubefabs to manufacture next-generation compound semiconductors.

What keeps your customers up at night?
Fabs are getting more expensive and complex, and this is a huge challenge as they look to expand. So we often start by doing everything we can to help them improve yields and eliminate waste. I also think that everyone is concerned about the resources involved with building new factories. This is what I see keeping them up at night, and it keeps up up at night trying to find new solutions for them.

What does the competitive landscape look like and how do you differentiate?
I do not obsess over competition and instead focus on invention. We think of factory control through the lens of a type of AI control that others have just not adopted yet. So our main competition is different philosophies for how things can be built, more than it is competitors themselves. For Cubefabs, no other company that I know of is doing anything like it.

What new features/technology are you working on?
We are always improving AI models. We are always looking to build more robustness into our own products with our own models. As we see with AI in general, things are moving fast. We want to move as fast as the consumer applications in the world with factory innovation. So, new types of production control are always being tested in our labs.

How do customers normally engage with your company?
For our imaging and factory control product we do validation testing for them in advance. We know that we need to prove ourselves before they take the risk of changing the paradigm that they are used to.  Our applications engineers are speaking with the customers, understanding the problems they are having and then demonstrating our capabilities. With Cubefabs we are engaging with companies themselves as well as municipalities and countries as they look to solve these large problems. We know that this is doing something different, so we engage through a lot of dialogue and testing to make sure that we are aligned with them.

Also Read:

CEO Interview: Barry Paterson at Agile Analog

An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure

CEO Interview: Roger Espasa of Semidynamics


LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis

LIVE WEBINAR Maximizing SoC Energy Efficiency: The Role of Realistic Workloads and Massively Parallel Power Analysis
by Daniel Nenni on 07-03-2024 at 2:00 pm

The Role of Realistic Workloads and Massively Parallel Power Analysis

As the complexity of modern System-on-Chip (SoC) designs continues to rise, achieving energy efficiency measured as performance per watt has become a crucial design goal. With the increasing demand for powerful, multifunctional chips, balancing performance with power consumption has become essential. Realistic workloads and advanced power analysis methods are vital for modern SoC design to help engineers improve energy efficiency early in the development process.

Traditional power analysis methods use synthetic simulation vectors to estimate SoC power consumption. These vectors, designed to mimic potential workloads, often miss the dynamic and unpredictable nature of real-world scenarios, resulting in significant lack of accuracy of power analysis. Often, designs that appear efficient in simulations may consume more power in actual use, leading to inefficient optimization efforts.

To address these limitations, incorporating software-driven workloads during power analysis is essential. Such realistic workloads provide an accurate representation of real-life applications, capturing nuances of power consumption that synthetic vectors miss. By emulating actual operating conditions, engineers can identify genuine power consumption bugs and optimize designs for better energy efficiency.

Advanced power analysis methods, such as using an emulation environment coupled with passively parallel power analysis, enable continuous monitoring and analysis of power consumption across multiple scenarios. This approach captures detailed power consumption data for real system operation, identifying patterns and anomalies that indicate inefficiencies. Such methods offer a true assessment of SoC power consumption, ensuring optimization efforts are based on accurate and relevant information.

One key benefit of using realistic workloads and advanced power analysis methods is the ability to ‘shift-left’ in the design process. Shifting left allows designers to address potential issues and optimizing designs earlier in the development cycle, preventing costly redesigns and ensuring the final product meets energy efficiency goals.

As the demand for powerful and efficient SoCs grows, traditional power analysis methods are no longer sufficient. Realistic workloads and advanced power analysis techniques offer a more accurate and comprehensive assessment of power consumption, enabling effective optimization. By shifting left and addressing energy efficiency early in development, companies can create competitive products that meet market demands.

Join our upcoming webinar on July 16 to learn more about these innovative approaches and enhance your SoC design’s energy efficiency. Register now to stay ahead of the rapidly evolving field of SoC design.

New Webinar: Making it Real: How to Use Realistic Workload Scenarios to Enhance Energy Efficiency in SoC Designs

Tue, Jul 16, 2024 10:00 AM – 11:00 AM PDT

Abstract:
As complexity of modern SoC designs is continuing to increase, energy efficiency – or performance per watt – has emerged as one of the primary design goals. Traditional methods of power analysis use synthetic simulation vectors – which may not represent real use cases. This approach may result in under-estimating power consumption, failing to detect real wasted power conditions, and guiding optimization efforts in the wrong direction. In this webinar, you will learn how using realistic workloads in the emulation environment, coupled with a passively parallel power analysis capability, provides a true assessment of the SoC power consumption, and enables you to have confidence to ‘shift-left’ to improve the energy efficiency of your design.

Speaker Bio:
William Ruby is the senior director of product management for Synopsys Power Analysis products. He has extensive experience in the area of low-power IC design and design methodology and has held senior engineering and product marketing positions with Cadence, ANSYS, Intel, and Siemens. William holds MBA, MSEE, and physics degrees, and has been awarded a patent in high-speed cache memory design.

Also Read:

Synopsys’ Strategic Advancement with PCIe 7.0: Early Access and Complete Solution for AI and Data Center Infrastructure

Synopsys-AMD Webinar: Advancing 3DIC Design Through Next-Generation Solutions

Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification


Solido Siemens and the University of Saskatchewan

Solido Siemens and the University of Saskatchewan
by Daniel Nenni on 07-03-2024 at 10:00 am

Solido USask 2024
A new tenured professor chair in the USask College of Engineering has been created to develop local talent and research, thanks to a significant gift from Siemens. (Photo: David Stobbe/University of Saskatchewan)

In my 40 years, I have worked for dozens of companies and just about everyone of them was acquired. Some of the acquisitions were accretive and some were not. Probably the best and most accretive one would be the Solido acquisition by Siemens EDA in 2017. I worked for Solido for ten years reporting to CEO Amit Gupta. I handled Taiwan and the foundry relationships, the most successful one being with TSMC of course. TSMC really put Solido on the map as both a customer and a great partner.

I have worked with companies all over the world but Solido was the first one based in Canada. It was also one of the best experiences of my career. I don’t think I have ever worked with a smarter group of people who were also fun to be associated with. Seriously, we had a LOT of fun traveling the world improving the quality of semiconductors and easing the design process.

Solido was founded in 2005 by Amit Gupta, who graduated from USask in 1999 with degrees in both EE and CS. Amit is now vice-president and general manager of Custom IC Verification at Siemens EDA and leads Solido’s products within the company. Berkely Design Automation and Fractal Technologies are also part of Amit’s domain, I worked for both BDA and Fractal as well. Siemens has the most aggressive acquisition group I have ever worked with but that is another story.

Siemens gift helps USask develop local talent in electronic chip design

The University of Saskatchewan (USask) has received a significant gift from Siemens to create a tenured professor chair in the USask College of Engineering for research and teaching that develops local talent in the large, fast-growing industry of electronic design automation (EDA).

“I am excited that Siemens is giving this gift to USask for the creation of the Siemens EDA Chair,” said Gupta. “The chair will advance EDA research and expertise of undergraduate and graduate students at USask that is critical in building the next generation of electronic devices. This will have a major impact on Saskatchewan’s technology sector.”

I chatted with Amit about this announcement and was not surprised to find out that Solido has aggressively recruited from USask. I remember when the acquisition happened, Solido had 50 employees in Saskatoon with the vast majority of them coming from USask. Today there are hundreds of employees in Saskatoon and more than 70% are from USask. By the way, Solido was one of the first companies to employ ML inside an EDA tool, another story as well.

The other part of this story is finding a Siemens EDA Chair. Applications are being accepted today!

Faculty, Siemens EDA Chair in Electronic Design Automation
Applications are invited from qualified individuals for a tenured or tenure-track faculty position in the Department of Electrical and Computer Engineering. The successful candidate will be appointed as the Siemens EDA Chair in Electronic Design Automation. The chairholder is expected to develop and teach courses in EDA at the graduate and undergraduate levels, establish a research program at the forefront of EDA development and compete successfully for external funding, engage with local industry working in the field, supervise student research, and undertake relevant administrative activities.

The University of Saskatchewan’s main campus is situated on Treaty 6 Territory and the Homeland of the Métis. The University of Saskatchewan is located in Saskatoon, Saskatchewan, a city with a diverse and thriving economic base, a vibrant arts community and a full range of leisure opportunities. The University has a reputation for excellence in teaching, research and scholarly activities and offers a full range of undergraduate, graduate, and professional programs to a student population of over 25,000.

The successful candidate must hold an earned Ph.D. in electrical or computer engineering or a closely related field and be eligible for registration as a professional engineer in Saskatchewan. We are seeking candidates who have demonstrated expertise in electronic design automation preferably in one or more of analog/mixed-signal verification, functional verification, verification methodologies for advanced process technologies, analog circuit simulation, statistical verification, custom verification, library characterization, or application of artificial intelligence techniques to EDA.  A publication record demonstrating research excellence and potential for establishing an independent research program is required.  Industrial experience in the design and application of EDA for custom IC verification is an advantage.  We are looking for a person with excellent communication and teaching skills and a demonstrated ability to work effectively in informal and formal groups with people from diverse communities, cultures and perspectives.  Depending on qualifications, appointment can be at the associate professor rank with tenure or at the tenure-track assistant professor rank.  Appointment with tenure requires a publication and teaching record that meets our standards for tenure.

Salary bands for this position for the 2024-2025 academic year are as follows:

Assistant Professor: $99,945 to $120,099; Associate Professor: $120,099 to $140,253

This position includes a comprehensive benefits package which includes a dental, health and extended vision care plan; pension plan, life insurance (compulsory and voluntary), academic long-term disability, sick leave, travel insurance, death benefits, an employee assistance program, a professional expense allowance, and a flexible health and wellness spending program.

Interested candidates must complete the applicant survey (link) and submit, via email, a cover letter; detailed curriculum vitae; a research plan outlining specific interests in EDA, a statement of teaching focus and philosophy including potential courses to be taught, a diversity statement explaining how you will contribute to equity, diversity and inclusion and the names and contact information of three professional references to:

Robert Johanson, Department Head
57 Campus Drive
University of Saskatchewan
Saskatoon, SK S7N 4L3
Email:  engrfaculty.recruitment@usask.ca

Status: Tenure Track
Employment Group: USFA
Full Time Equivalent (FTE): 1.0
Posted Date: 6/27/2024
Closing Date: Until Filled

Due to federal immigration requirements, we also ask candidates to indicate whether they are Canadian citizens, permanent residents, or are otherwise already authorized to work at this position for the duration of the appointment, with an explanation if this last category is indicated.

Review of applications will be ongoing however, applications will be accepted and evaluated until the position is filled. The anticipated start date is September 1, 2024.

Also Read:

Three New Circuit Simulators from Siemens EDA

Siemens Provides a Complete 3D IC Solution with Innovator3D IC

New EDA Tool for 3D Thermal Analysis


Podcast EP233: A Review of the Q1 2024 ESD Alliance Quarterly Electronic Design Market Data Report with Wally Rhines

Podcast EP233: A Review of the Q1 2024 ESD Alliance Quarterly Electronic Design Market Data Report with Wally Rhines
by Daniel Nenni on 07-03-2024 at 8:00 am

Dan is joined by Dr. Walden Rhines. Wally is a lot of things, CEO of Cornami, board member, advisor to many and friend to all. In this session, he is the Executive Sponsor of the SEMI Electronic Design Market Data Report.

Wally discusses the recent Q1 2024 ESD Alliance Quarterly Electronic Design Market Data Report with Dan. It was another strong quarter with 14.4% overall growth, an increase from the Q4 2023 number. Wally begins by saying, “the hits just keep coming.”

Overall growth was double digit for all but one region and all but one product category. Wally discusses these dynamics with Dan. It turns out there appears to be one region that is poised for a major comeback as well. The dynamics of the market in China are also discussed, along with a review of the work going on at Wally’s company, Cornami and the impact packaging innovation is having on the overall market.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group or individual.


Insights into Automotive AI in China

Insights into Automotive AI in China
by Bernard Murphy on 07-03-2024 at 6:00 am

Automotive AI in China min

Now that claims and counter claims about advances in foundational AI seem to be dying down, it becomes more interesting to look at the next wave – AI applications in key markets. Figuring out what is really happening here presents its own problems. Marketing and analyst literature still projects unbounded promise (now dialed back a bit), though some surveys suggest that enterprise adoption for business applications is still aspirational rather than mainstream. I now choose to look only at reasonably independent application surveys (here automotive), for example as reported in journals of peer reviewed literature.

Why a China focus?

The Chinese auto industry is the largest in the world by a wide margin as measured by unit production, which by itself is a pretty interesting statistic. That fact might be significant only within China if it weren’t for the fact their auto sales are also starting to grow in southeast Asia. While currently accounting for less that 10% of unit sales, Chinese OEMs are investing in factories across that region, expanding also in Brazil and now talking about Mexico. Separately, Volvo, now owned by a Chinese holding group, are promoting their EX30 and Polestar cars in Europe and the US. Whether or not these cars will clear US regulatory hurdles, it looks like Chinese automakers see opportunity to expand outside Asia.

The more important indicator for my purpose is that Chinese research in ADAS and autonomy is accelerating rapidly, no doubt motivated by tariffs/embargos. This is particularly obvious in automotive AI as judged by this paper from the China Automotive Technology and Research Center in Tianjin. Which in my view makes this area very interesting to watch.

Active production and R&D

Augmented reality (AR) heads-up displays (HUD) are one application space that seems to be tracking closely with Western R&D. There are several players here. Full-featured solutions depend on collaboration between the driver monitoring system (DMS)/pupil tracking, forward looking cameras, landscape perception (segmenting road regions, identifying nearby cars, pedestrians) and AR image rendering.

Subsets of this space are driver monitoring systems and occupant monitoring systems (OMS). Here DMS checks for closed or closing eyes or abnormal pose (is the driver slumped over or to one side?) to detect fatigue. OMS checks that you didn’t leave a child, an elderly person or a pet in the car. Here also there are multiple active deployments. Research here is looking at ensemble (multiple coupled) learning systems.

ADAS is already routine in China and BYD is actively testing L3 ADAS in Shenzen. This program started quite recently, so presumably will take time to build an adequate training database. Then again, the Chinese seem somewhat resigned to external monitoring so may be more open to external methods to assist car-based AI. Research here also is working with coupled systems including reinforcement learning, to predict vehicle trajectory and for lane keeping.

Fingerprint and facial recognition are already available to unlock and start some models, despite the occasional PR disaster. Research continues for handling challenging illumination conditions which can reduce accuracy for face-based recognition. Here again research is considering ensemble-based systems, presumably to recognize more complex facial characteristics than can be captured in a single training set. also factoring in physiological sensing for the driver. This is an intriguing video review of the new Xpeng G3 model, mentioning among other things facial recognition and physiological monitoring.

In cockpit control, hand gesture recognition as an alternate method of control is already available in some Chinese cars. Tencent has announced a mobility solution (I think voice-based) built on LLMs. While there has been an explosion in options in this space, I would imagine that will settle fairly quickly to a few survivors such as TenCent.

To round out in-cabin automation, 360o view monitoring and blind spot detection are now commonplace and advancing, for example looking for parking line markers and low obstacles (child, dog, kids bike).

Recognized challenges

The paper lists several challenges in execution and in adoption. Some of these are routine, others are interesting either for a different insight or for China-unique perspectives. There is recognition that on-board AI may not be sufficient for complex tasks and will need external (cloud) support. Which raises concerns about privacy and security. Chinese car buyers worry about this too according to the paper.

The authors also call out general low enthusiasm for AI-based features among Chinese drivers. They attribute this partly to learning curve but also partly to unpredictable quality in these systems. I think the argument here is that AI may be a great sales tool in the showroom but may see low usage in practice.

One problem they call out is weak linkage between hardware and software development teams, where they say in China collaborative hardware/software development still lags other countries.

Finally, the Chinese are wrestling with policy and regulatory concerns, just as we are. Even in that country there are no easy ways to bound factors like liability, privacy and security.

Takeaways

It seems clear in current deployment alone that Chinese auto makers are keeping up with other automakers, in the West and elsewhere in Asia. Meanwhile research also seems to be tracking research outside China. Whether we will see any of these cars in the US is now more a political question than a technical question, especially given the very low price tags on offer. I’m sure there will be quality problems, though our own automakers are hardly blameless in that department.

Worth continuing to watch.


What if China doesn’t want TSMC’s factories but wants to take them out?

What if China doesn’t want TSMC’s factories but wants to take them out?
by Claus Aasholm on 07-02-2024 at 10:00 am

Foundry Numbers 2024

Insights into the Semiconductor Industry and the Semiconductor Supply Chain

I am not an expert in geopolitical issues, but lately, my research has begun to worry me. As I was preparing to be interviewed for Chinese media, I was in my “Chinese Zone”, adapting to what is palatable to a Chinese audience. Maybe my mode provoked the thought:

Who would benefit from eradicating the entire Taiwanese Semiconductor industry?

What if China is not deterred by potentially mined TSMC factories and ASML kill switches? What if the reunification plan is based on eradicating the TSMC factories and the Semiconductor supply chain in Taiwan and beyond?

For the first time, I can see the outline of a military invasion plan that can significantly benefit China, but the implications are scary. While I have no indications that this is actually about to happen, this is within the “Strong Man” thinking. This article describes that scenario and its implications.

The Three Reunifications Scenario

My upbringing in a small, peaceful country devoid of geopolitical ambitions during the Cold War has shaped my understanding of these issues. Living less than 200km from the Warsaw Pact border, I witnessed the system before and after the wall fell. The system didn’t crumble with the wall. It retreated to Russia, reorganising under the guise of democracy and economic reform. I experienced this firsthand during my extensive travels in Russia, not just the “civilised” parts.’

I’m not writing this in my mother tongue and only a few comprehend what it means to be Danish. As a small nation, we are not imperial and don’t need nationalism, we need cooperation with other countries, primarily in the coal union that brought peace to the parts of Europe that formed the EU.

Although not an expert, I feel qualified to give my view of the geopolitical situation, and I have no problem with others disagreeing with my assessment.

The background

After the fall of the Soviet Union, a new US-led, rules-based world order began. It was based on alliances and corporations and supported civil rights, free speech, and democracy. It was the birth of globalism.

The Semiconductor supply chain evolved and grew in locations where it made the most sense, and nobody interjected or tried to dictate this development. Most US semiconductor companies were happy to eliminate the hassle of making chips that could be made better and cheaper in Asia.

The world is moving from the rule of law to the law of rulers

That order is now breaking down. The US standings in the world have deteriorated due to long wars with little plans for the aftermath and the increasing division of the US society. Trust in elections and institutions is at an all-time low. The more the US tries to dictate the world order, the less it succeeds, as the USA has become unpredictable to the rest of the world. The outcome of a US election can now create two very different scenarios for the world order, and the election itself will be disrupted no matter what. A few votes in a swing state, a Florida judge or a Supreme Court decision can decide the election.

World order and Strong men

The breakdown of the rules-based world order got plenty of help from the outside. Democracy and free speech are not Strong Men’s favourite dishes. It goes against the dictator’s playbook, which has three chapters:

  • The Enemy Within – I alone can fix it
  • Prosperity – I am the system, and it is good for you
  • The external Enemy, I am the only one to protect you.

The enemy within is the tool to gain power. The breakdown of trust in politicians, institutions and society in general. It culminates when political opponents are hated more than external “enemies”.

For many years, Putin had a “deal” with the Russians that if they stayed out of politics, he would make them more prosperous, and he did. From the late nineties and 15 years on, the standard of living increased dramatically. But this was built on an organised cleptocracy that stole from the people and eventually ran out of steam.

Enter the external enemy. It is time to make Russia great again, first by covert little green men operations and later the full-scale invasion of Ukraine. As this did not go well, the enemy was changed from Ukraine to the West. “We are fighting the collective forces of the West.”

The overarching objective of a Strong Man is to keep power after securing it. Self-perseverance is key. If only a few per cent of the population starts to protest, you are in trouble. Stability is your friend.

Where Putin is deep in 3 and has transformed the entire Russian society into a war economy, President Xi is likely at the end of 2. The massive infrastructure and real estate investments are starting to look hollow, and economic growth is slowing. It’s time to make China great again.

Everyone is aware of China’s increasing military ambitions. Its claim to atolls in the South China Sea and naval conflicts with all its neighbours point to a new geopolitical reality.

The no-limits partnership between Russia and China and the latest treaty between North Korea and Russia opens up the possibility of a potentially devastating conflict to make Russia, Korea and China reunified and great again.

He who controls the present controls the past.
He who controls the past controls the future.
George Orwell, 1984

A vital element of the Strong Man’s storyline is the past. Everything was better, and we were stronger and a larger unified nation. If you have the ultimate power, you can make insurrections, nuclear accidents, and squares disappear. The past is no stranger to a strong man.

Ruler of the past (what is left)

While Western politicians come and go, China and Xi understand how to play the long game. The semiconductor industry has been a focus area for decades, while Western corporations cannot see beyond the quarterly boundary.

I slept relatively well at night, believing China couldn’t conquer Taiwan and preserve the Semiconductor industry. A scenario without winners that would set the world back 15 years or more.

I realised that a destructive reset could become a long-term advantage in a long game. If Xi were willing to turn back the clock 15 years, China could emerge as the winner of the past, of whatever was left.

Prelude

The Three Reunifications Scenario might not be the original plan, but it could have developed due to Russia’s invasion of Ukraine. This is the prelude that China has observed the overwhelming Russian war machine being degraded by drones and precision weapons from the West. It is unlikely that other invasions will differ, so any attempt to conserve part of the conquered industry is an illusion. Destruction is inevitable.

Diversion

Surprisingly, China has not commented much on the Russis-North Korea Defense pact. Why is China not uncomfortable with Little Rocket Man getting better rockets? Maybe because the next part of the plan is a North Korean attack on South Korea. This would further stretch Western military resources and deplete the already dwindling military resources. China could lean back and say: Not our problem. While it is unlikely that North Korea can conquer South Korea, it can destroy a lot of the South Korean Industry.

Finale

The West’s involvement in two wars of attrition forms the basis for an invasion of Taiwan. There is a limit to how many conflicts the US military and its Western allies can be in simultaneously. That might allow China to invade Taiwan without too much or any direct involvement from outside forces. With part of the US political establishment becoming more isolationistic, the West would likely be unable to handle three military flashpoints at a time.

Although I knew the tensions between Ukrainians and Russians first-hand, I was convinced Russia would not invade – I could not see the logic (maybe strongmen don’t use logic). I hope I am also wrong about the Three Reunifications Scenario. Unfortunately, I can see the logic in it from a Chinese perspective.

The current Manufacturing View:

Although not all companies have all manufacturing in their legal jurisdiction, it is the exception rather than the rule.

The distribution of semiconductor Property, Plant, and Equipment (PPE) gives a good overview of the manufacturing capacity from a geographic perspective. Chinese privately (state) owned companies are adding an estimated 35B$. These companies specialise in Memory, Micro, CPU, and mobile semiconductors.

While PPE includes other assets, these are very small for a Semiconductor Manufacturing Company. The Fabs and equipment dominate PPE. It can also be argued that PPE is higher per dollar of revenue in the US than in China and that advanced manufacturing takes more PPE value. These are all fair arguments to consider. Still, PPE is a much more solid number than most in the industry.

We divide manufacturing capacity into three categories:

  1. Integrated Device Manufacturing (IDM)
  2. Semiconductor Foundry
  3. Mixed Manufacturing

Traditionally, all semiconductor companies were IDMs that manufactured and sold branded products. With the emergence of TSMC, companies could choose to outsource manufacturing and go fabless. Some companies have chosen the mixed model and retained some manufacturing capacity while outsourcing the rest.

Property, Plant and Equipment $M, by Country of Incorporation, March 31st, 2024

The USA is still dominant despite some US capacity in other jurisdictions, so the physical location is elsewhere. Intel has Fabs in Ireland, Israel, and Malaysia, but most of its capacity is in the US. From a PPE perspective, Intel is not getting as much value from its manufacturing assets as TSMC is. This is a function of Intel making subpar manufacturing decisions, excluding Deep UV equipment. Despite these discrepancies, we still believe that a PPE analysis is solid and a source of good insights.

The PPE analysis shows that most of the chip manufacturing capacity is concentrated around the East China Sea, and 50% is in potential “Reunification” zones.

China’s 12% share of global PPE might sound low, but it is growing incredibly. Despite the US lead embargo, China still buys nearly half of the Western semiconductor tools sold, amounting to a roughly 31B$ annual run rate plus an additional 4B$ of Chinese tools. The embargo and Chips Act only accelerated this development.

The total Chinese PPE is projected to pass 100B$ within a year with these numbers. A near 50% growth will give China an estimated 18% global capacity.

If the semiconductor manufacturing capacity of South Korea and Taiwan is excluded, China will have a third of the global capacity by the end of the year. For every year that passes, China will gain more capacity than even the US.

With the exclusion, the total capacity, based on PPE, will decline from 550B$ to 300B$

Revenue versus Capacity

As global semiconductor revenue has been an average of $550B over the last couple of years, and the combined PPE is also around 550B$, it can be assumed that 1$ of PPE can generate 1$ of annual revenue. This might be too crude for accounts, but it can be used for this scenario.

Excluding Taiwanese and South Korean manufacturing, the world would be set back 15 years from a manufacturing standpoint. China would command 1/3rd of the capacity at the end of this year. This share would grow significantly every year any military action is delayed. Time is on China’s side.

How this will be devastating to the US

Based on the PPE analysis, the US would be a significant winner in the Three Reunifications Scenario, but there are some complications. The first is that the US capacity is concentrated in one company, Intel, which is not in the best of shapes. As with the other US semiconductor companies, Intel’s business heavily depends on the supply chain in Asia, especially the high-tech supply chain of Taiwan, Korea and Japan.

The destruction of the Semiconductor Supply Chain

The destruction will not only impact semiconductor manufacturing but also the semiconductor supply chain. A Korean conflict could impact US manufacturing positively, while the supply chain implications are minimal. A Taiwanese conflict, however, would be negative for the US. For the large US fabless companies it would be catastrophic and US rely a lot on the high tech Taiwanese supply chain.

The smaller and more sheltered Japanese and European Semiconductor industries are more sheltered and self-sufficient from a supply chain perspective and would likely fare better than the US.

Excluding Taiwanese and South Korean manufacturing, the world would be set back 15 years from a manufacturing standpoint. China would command 1/3rd of the capacity at the end of this year. This share would grow significantly every year any military action is delayed. Time is on China’s side.

How this will be devastating to the US

Based on the PPE analysis, the US would be a significant winner in the Three Reunifications Scenario, but there are some complications. The first is that the US capacity is concentrated in one company, Intel, which is not in the best of shapes. As with the other US semiconductor companies, Intel’s business heavily depends on the supply chain in Asia, especially the high-tech supply chain of Taiwan, Korea and Japan.

The destruction of the Semiconductor Supply Chain

The destruction will not only impact semiconductor manufacturing but also the semiconductor supply chain. A Korean conflict could impact US manufacturing positively, while the supply chain implications are minimal. A Taiwanese conflict, however, would be negative for the US. For the large US fabless companies it would be catastrophic and US rely a lot on the high tech Taiwanese supply chain.

The smaller and more sheltered Japanese and European Semiconductor industries are more sheltered and self-sufficient from a supply chain perspective and would likely fare better than the US.

China, however, would emerge as the winner. The Chinese semiconductor industry follows the deep tradition of locally building the entire supply chain. From raw goods to finished products.

As semiconductor materials manufacturing is not as PPE intensive as semiconductor manufacturing, it is more relevant to look at revenue:

According to SEMI research, in 2023, more than 35% of all Semiconductor materials outside Taiwan and South Korea will be in China.

Taking out most of the leading-edge manufacturing and supply chain would leave the Chinese semiconductor industry in the sweet spot, ready to serve the world. As the Chinese are experts in value chains, they are not likely to sell their semiconductors directly to the West, but they will be more than happy to sell them wrapped in products. Your next electronic products—phones, PCs, and Cars—might be Chinese, but you must wait until AI is back on the agenda, as the Semiconductor clock has reversed a few years.

It would serve many of Xi’s goals, including reunification, however ugly. An external enemy could be potentially humiliated by non-intervention. China is emerging as the number one country in semiconductors (based on mature nodes turned leading edge), with most of the high-tech manufacturing in the world.

As I started by saying: Fortunately, this is just a scenario….

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Automotive Designs Have No Room for Error!

Automotive Designs Have No Room for Error!
by Daniel Nenni on 07-02-2024 at 6:00 am

Automotive electronics

Automotive designs demand a high level of fault tolerance, and one of the methods to achieve this is to use error correcting codes (ECC). This Wikipedia page ECC Memory gives a flavor, though that article concentrates on memory and we are interested in wider applications using a form of forward error correction. This technique can be applicable to both memories (to detect and or correct data storage errors) and interconnect busses (to detect and or correct transmission errors). There are various levels of protection possible, and for automotive the choice of SECDED (Single Error Correction, Dual Error Detection) is popular. There are however multiple ways to implement this, such as choices of word size and particular error correcting code. There are trade-offs between efficiency (in terms of the number of extra bits required for the coding), degree of protection, and latency to consider.

At first glance, the selection of automotive-qualified IP incorporating ECC features would seem to be a boon for the designer of an automotive system on chip. It conjures the idea that one can just buy the parts and plug them together. However, there are many factors to consider, and traps for the unwary. The use of ‘end-to-end’ ECC for a data route between two IP blocks in attractive in terms of simplicity and efficiency, but only works if the IPs at each end support the same code and operate at the same word size. Unfortunately, they often don’t. Furthermore, even when the two ends of a data route are compatible, the Network on Chip (NoC) that routes data between them may combine or split the data transactions into larger or smaller word sizes for good reasons of address alignment and network performance and/or protocol conversion.

An additional challenge to deal with is to be sure that the various IPs uses the same equations. SECDED could be performed in different ways. So, one will then need to adapt the two ends preserving the encoding / decoding equations with the issue that the code is owned by different IP providers. This forces the usage of dedicated bridges knowing encoding to decode and correct.

Whilst that is what a NoC is supposed to do, this can eliminate the possibility of end-to-end ECC altogether. In those circumstances, it may be necessary to encode and decode the ECC protection several times in different ways as the data makes its way around the SoC. This adds a great deal of complexity, not only to implementation, but to verification. On the plus side to trade this off, it also adds more protection because if you have multiple independent stages of error correction, you can cope with more errors.

This is just one of the many complexities that have to be considered when designing ultra-complex custom chips for automotive applications. We have years of experience in this area with skilled engineers who know exactly how to design automotive chips that will ensure that IP blocks work together as described above. We have just taped out such a design for a Tier 1 automotive company so, if you want an automotive design where all the errors are correctly corrected, contact us now using this LINK.

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Career in EDA Versus Chip Design: Solving the Dilemma

Career in EDA Versus Chip Design: Solving the Dilemma
by Jai Pollayil on 07-01-2024 at 6:00 am

EDA Semiconductor

Chip design and Electronic Design Automation (EDA) are two sides of the same coin in the semiconductor industry. Both fields are critical for developing the advanced integrated circuits (ICs) that power our modern world. This article explores the differences between a career in chip design and EDA, drawing on my personal experience transitioning from chip design to leading Application Engineering team at Ansys Semiconductor division globally.

My Journey from Chip Design to EDA

I began my career in the year 2000 as a circuit design engineer at Alliance Semiconductor (now part of ON Semiconductor). There, I focused on designing memory chips using circuit schematic/layout capture tools and spice simulators. In this role, the emphasis was on the engineer’s skillset rather than an in-depth understanding of EDA tools.

Transitioning to digital IC design at Texas Instruments (TI) exposed me to the significant reliance on EDA tools in the digital design domain. The success of a design heavily depended on both the engineer’s expertise and the capabilities of the EDA tool itself. This realization sparked my interest in the EDA world.

The Allure of EDA

While at TI, I interacted with EDA Application Engineers who played a crucial role in helping chip designers achieve optimal results. Witnessing their expertise, I recognized that for chip backend designers, true mastery required not only design skills but also a deep understanding of the underlying EDA tools. This realization paved the way for my move to the EDA industry.

The Advantages of an EDA Career
  • Technical Exposure: Working in EDA as an application or product engineer offers exposure to advanced technologies like BSPDN and SPR well before they reach chip designers. You become part of a larger ecosystem that shapes the future of semiconductor technology.
  • Cross-Team Collaboration: EDA companies like Ansys foster a collaborative environment where chip design, package design, and board design are integrated, unlike the compartmentalized structure often found in semiconductor companies. This collaboration is becoming essential for designing complex multi-die/3D IC systems.
  • Business Acumen: As an application engineer, you’re closer to the revenue stream, collaborating with sales teams and witnessing the direct impact of your efforts on the company’s growth.
  • Work Culture and Benefits: EDA companies typically foster a more customer-focused work culture, with opportunities for travel and a better work-life balance compared to the chip design industry with its highly demanding tapeout deadlines.
  • Industry Stability: The EDA industry boasts excellent compensation and benefits, with a stable and resilient revenue model as the business deals in EDA are mostly based on multi-year contracts. The growing number of chip design companies and the increasing complexity of ICs further fuel the demand for EDA tools.
  • The Future of EDA: With the rise of Artificial Intelligence and Machine Learning, the role of EDA tools are becoming ever more crucial. Chip designers are relying more heavily on these tools, making the future of the EDA industry exceptionally bright.
Conclusion

Choosing between a career in chip design and EDA depends on your individual preferences. If you enjoy a hands-on chip design experience, areas like analog circuit design might be a better fit. But if you crave exposure to cutting-edge technologies, business insights, and a collaborative work environment, then EDA offers a compelling path. The increasing interdependence between these two fields creates exciting opportunities for those considering a career in either domain.

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