Veriest is headquartered in Israel with engineering sites in Serbia & Hungary. The team has accumulated a wealth of experience through involvement in projects in the forefront of semiconductor technology.
Veriest maintains unrivaled quality standards in terms of both service and knowledge. With the ability to take on all significant parts of the design process ourselves, we offer detailed expertise coupled with a big-picture view that enables us to successfully address any issue that arises during the verification process.
By demanding complete accuracy and taking into account all the intricacies of each specific case, including schedules, resource limitations and technical specifications, Veriest is able to achieve the very best levels of efficiency.
Today Veriest invites us to the very best online meetup on September 22nd 2020 at Israel 5pm | CET 4pm | GMT 3pm | US ET 10am | Central 9am | PT 7am.
About this event
Veriest believes in knowledge sharing. This is why we organize a series of on-line meetups attended by design & verification professionals from 15 different countries. So far, we hosted experts from Intel, Texas Instruments, ST Microelectronics, Axis Communications and other great companies.
Here is a short recap of the previous meet-up:
Now Veriest is inviting us to join their next event, with an interesting keynote about Safety in Deep Learning devices and an award-winning technical presentation about formal verification of deadlock cases:
Speakers and Agenda
Moshe Zalcberg, CEO, Veriest
Keynote presentation
Jyotika Athavale, Principal Engineer, Intel US; IEEE Senior Member
Functional Safety and Soft Error Rate Modeling for Deep Learning Applications
Technical presentation
Laurent Arditi, Sr. Principal Engineer, Arm France
Easy Deadlock Verification and Debug with Advanced Formal
* Best Paper award at DAC’2020
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