CadenceTECHTALK: Find Elusive Bugs Faster with Xcelium ML

CadenceTECHTALK: Find Elusive Bugs Faster with Xcelium ML
by Admin on 01-16-2023 at 2:13 pm

Crack the Verification Double Trouble!

Register for CadenceTECHTALK to find out how to achieve verification closure with the same coverage with up to a 10X reduction in simulation cycles.

Chips are becoming bigger and more complex, adding to already existing verification woes. Design and verification engineers struggle with… Read More


CadenceTECHTALK: Low-Power Verification Using Xcelium Simulation

CadenceTECHTALK: Low-Power Verification Using Xcelium Simulation
by Admin on 01-16-2023 at 2:09 pm

Don’t let power-related issues that appear late in the verification cycle impact your project schedule. Register for a webinar that shows you how to catch low-power issues early on.

The Cadence low-power solution considers power at every step of the design flow, from architecture to functional verification, analysis, implementation,… Read More


Webinar: Find More Bugs, Hit the Most Difficult Scenarios Faster

Webinar: Find More Bugs, Hit the Most Difficult Scenarios Faster
by Admin on 12-20-2022 at 12:51 pm

Register for CadenceTECHTALK to find out how to achieve verification closure with the same coverage with up to a 10X reduction in simulation cycles.

Chips are becoming bigger and more complex, adding to already existing verification woes. Design and verification engineers struggle with running billions of regression cycles… Read More


Webinar: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Webinar: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator
by Admin on 12-09-2022 at 12:55 pm

Date: Tuesday, December 13, 2022

Time: 09:00 GMT / 10:00 CET / 11:00 EET & Israel / 14:30 IST

Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium is a leader in simulation performance, and we focus relentlessly on improving the core… Read More


Machine Learning Applications in Simulation

Machine Learning Applications in Simulation
by Daniel Nenni on 10-27-2022 at 6:00 am

Xcelium ML min

Machine learning (ML) is finding its way into many of the tools in silicon design flows, to shorten run times and improve the quality of results. Logic simulation seemed an obvious target for ML, though resisted apparent benefits for a while. I suspect this was because we all assumed the obvious application should be to use ML to refine… Read More


Cadence TECHTALK: Low-Power Verification using Xcelium Simulation

Cadence TECHTALK: Low-Power Verification using Xcelium Simulation
by Admin on 10-19-2022 at 2:12 pm

Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel / 13:30 IST

The Cadence low-power solution considers power at every step of the design flow, from architecture to functional verification, analysis, implementation, and signoff. In this webinar, the focus will be on the functional verification of the RTL with the power intent

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Cadence TECHTALK: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator

Cadence TECHTALK: Best Practices to Achieve the Highest Performance using Xcelium Logic Simulator
by Admin on 10-12-2022 at 12:17 pm

Simulator performance is critical owing to the exponentially increasing complexity of SoC designs and shrinking market time. Cadence® Xcelium is a leader in simulation performance, and we focus relentlessly on improving the core performance of the simulator. We keep developing new performance optimizations that are delivered

Read More

CadenceTECHTALK: Xcelium Apps: Everything You Need in the Simulation Metaverse

CadenceTECHTALK: Xcelium Apps: Everything You Need in the Simulation Metaverse
by Admin on 09-15-2022 at 1:56 pm

Date: Wednesday, September 21, 2022

Time: 9:00am – 10:00am PDT

Register for this CadenceTECHTALK if you are looking for an end-to-end solution for all your verification requirements in automotive, mobile, and hyperscale designs.

This CadenceTECHTALK introduces Xcelium Apps, a portfolio of domain-specific technologies… Read More


CadenceTECHTALK: Find more Bugs, Hit the Most Difficult Scenarios Faster

CadenceTECHTALK: Find more Bugs, Hit the Most Difficult Scenarios Faster
by Admin on 09-15-2022 at 1:44 pm

Date: Thursday, September 29, 2022

Time: 09:00 BST / 10:00 CEST / 11:00 EEST and Israel

Crack the Verification Double Trouble! Chips are becoming bigger and more complex, adding to already existing verification woes. Design and verification engineers struggle with running billions of regression cycles to achieve the desired

Read More

Accelerate DFT Simulations with Xcelium Multi-Core Technology

Accelerate DFT Simulations with Xcelium Multi-Core Technology
by Admin on 05-17-2021 at 12:04 pm

Overview

High-performance DFT simulation is key to completing today’s complex systems on chip (SoCs) on schedule. Because most simulators were developed before the multi-core era, they process Verilog code in a single thread, managing a single active queue of events and handling them one at a time. The serial method in

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