GCU and TSMC’s MSI Pathway Webinar

GCU and TSMC’s MSI Pathway Webinar
by Admin on 02-17-2026 at 12:58 pm

Description

This virtual session is your opportunity to explore Grand Canyon University and TSMC’s one-semester Manufacturing Specialist Intensive, industry funded pathway. Join to find out how you can start building your future in semiconductor manufacturing trades. Whether you’re looking to upskill, change career… Read More


Webinar: Intelligent Networks: Power, Reliability & Maintenance in Telecom

Webinar: Intelligent Networks: Power, Reliability & Maintenance in Telecom
by Admin on 02-10-2026 at 10:18 am

About

As global connectivity demands surge, network infrastructure hardware is under unprecedented pressure to deliver higher performance, lower latency, and greater energy efficiency, while remaining cost-effective and reliable. This challenge is compounded with the explosive growth of AI applications, emerging 5GRead More


Webinar: How Secure Are Your Critical Aerospace & Defense Systems?

Webinar: How Secure Are Your Critical Aerospace & Defense Systems?
by Admin on 01-12-2026 at 8:37 pm

Aerospace, defense, and other mission-critical technologies face rapidly evolving hardware threats. A hobbyist can add a single board computer to a consumer device. A nation-state can scale an exploit across critical infrastructure. The attack surface widens fast, and the security implications are real.

Adversaries are… Read More


Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon

Live Webinar: Considerations When Architecting Your Next SoC: NoC with Arteris and Aion Silicon
by Daniel Nenni on 11-27-2025 at 8:00 am

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The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More


Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICs

Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICs
by Mike Gianfagna on 09-11-2025 at 10:00 am

Webinar Preview – Addressing Functional ECOs for Mixed Signal ASICs

An engineering change order, or ECO in the context of ASIC design is a way to modify or patch a design after layout without needing to re-implement the design from its starting point. There are many reasons to use an ECO strategy. Some examples include correcting errors that are found in post-synthesis verification, optimizing … Read More


WEBINAR: Functional ECO Solution for Mixed-Signal ASIC Design

WEBINAR: Functional ECO Solution for Mixed-Signal ASIC Design
by Daniel Nenni on 09-04-2025 at 8:00 am

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This webinar, in partnership with Easy-Logic Technology, is to address the complexities and challenges associated with functional ECO (Engineering Change Order) in ASIC design, with a particular focus on mixed-signal designs.

The webinar begins by highlighting the critical role of mixed-signal chips in modern applications,… Read More


WEBINAR: Edge AI Optimization: How to Design Future-Proof Architectures for Next-Gen Intelligent Devices

WEBINAR: Edge AI Optimization: How to Design Future-Proof Architectures for Next-Gen Intelligent Devices
by Daniel Nenni on 07-03-2025 at 10:00 am

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Edge AI is rapidly transforming how intelligent solutions are designed, from smart home devices to autonomous vehicles, healthcare gadgets, and industrial IoT. Yet, architects, chip designers, and product managers frequently grapple with a common and daunting challenge: creating efficient, high-performance AI solutions… Read More


WEBINAR Unpacking System Performance: Supercharge Your Systems with Lossless Compression IPs

WEBINAR Unpacking System Performance: Supercharge Your Systems with Lossless Compression IPs
by Daniel Nenni on 07-03-2025 at 6:00 am

CAST Compression IP Webinar 400x400

In today’s data-driven systems—from cloud storage and AI accelerators to automotive logging and edge computing—every byte counts. The exponential growth in data volumes, real-time processing demands, and constrained bandwidth has made efficient, lossless data compression a mission-critical requirement. Software-based… Read More


Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction

Upcoming Webinar: Accelerating Semiconductor Design with Generative AI and High-Level Abstraction
by Daniel Nenni on 03-27-2025 at 10:00 am

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We have been hearing so much lately about the power of AI and the potential of technologies like agentic AI to address the productivity gap and complexities of semiconductor designs of today and tomorrow.  Currently, however, the semiconductor industry has been slow to adopt generative and agentic AI for RTL design code.   There… Read More


WEBINAR: Silicon Area Matters!

WEBINAR: Silicon Area Matters!
by Daniel Nenni on 08-14-2024 at 8:00 am

SemiWiki Flex Logix Webinar

When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die area, thereby reducing both cost and power consumption while maximizing performance.

Similarly, when incorporating embedded… Read More