We live in an age of abundant information. There is a tremendous exchange of ideas crisscrossing the world enabling new innovative type of products to pop up daily. Therefore, in this era there is a greater need to understand competitive intelligence. Corporate companies today are interested in what other competitors are brewing… Read More
Tag: vlsi
Virtual Training Workshop: Advanced Physical Design using OpenLANE/Sky130
Physical Design or PnR (Place and Route) is the core of any IC design cycle. From a RTL netlist to final tape-out, each phase of PnR brings it’s own challenges and surprises. “What are these challenges?” “What is the process?” “Can I build a chip of my own?”- If you have these questions and if you are eager to delve into the world of ASIC
VLSI Design/CAD Symposium 2022
Sincerely welcome everyone to participate in the 33rd Seminar on Ultra Large Integrated Circuit Design and Computer Aided Design Technology in 2022. The conference will last for four days from August 2 to August 5. It was originally scheduled to be held at Kaohsiung E-Da Royal Hotel. Due to the outbreak of the new crown Omicron… Read More
2022 IEEE SYMPOSIUM ON VLSI TECHNOLOGY AND CIRCUITS
HILTON HAWAIIAN VILLAGE
HONOLULU, HAWAII
JUNE 12-17, 2022
ABOUT THE SYMPOSIA
The founders of the Symposia, Professors Shoji Tanaka and Walter Kosonocky, first organized the VLSI Technology Symposium in 1981 to provide an opportunity for world’s top technologists to engage in an open exchange of ideas on what was quickly becoming
Tracing Technology’s Evolution with Patents
2020 Symposia on VLSI Technology and Circuits
VLSI 2020 is going virtual!
Given the global health concerns associated with COVID-19 (Coronavirus), the organization of VLSI 2020 has decided to hold the 2020 VLSI Symposia on Technology and Circuits as a virtual conference. Although we will not be meeting in Honolulu this year and it will be impossible to reproduce the lively
Webinar: VLSI Design Methodology Development (new text)
Daniel Nenni was gracious enough to encourage me to conduct a brief webinar describing a new reference text, recently published by Prentice-Hall, part of the Semiwiki Webinar Series.
VLSI DESIGN Methodology Development Webiner Replay
Background
I was motivated to write the text to provide college students with a broad background… Read More
What Fairchild, AMD, Actel and Jurassic Park Have in Common
Me.
In the early stories of this series (Weeks three though six), I talked about what I believe were the three seminal events in the history of the semiconductor: Shockley’s invention of the transistor, Noyce’s invention of the integrated circuit, and Intel’s 1971 — the introductions of the first commercially successful… Read More
Is there anything in VLSI layout other than “pushing polygons”? (4)
The year is now 1991 and in search for a more peaceful life we decided to move to Canada. At that time, very few companies had advanced flows in VLSI but Ottawa having BNR, Northern Telecom, Mitel, etc., looked to be the most promising place. After a few hiccups in finding a job, I landed in MOSAID, a small company with35 people at that … Read More
Application binary interface, get this right and RISC-V is all yours
Starting a career in static timing analysis domain, and now actively working on an opensource implementation flow of RISC-V architecture, has been a journey. For last couple of months, I guess from around March this year, I was hooked to RISC-V buzz which was all over my Linkedin, my messages.
Being an STA and Physical design engineer,… Read More