Webinar: Security for AI SoCs: Practical Solutions for the Challenges of Today and Tomorrow

Webinar: Security for AI SoCs: Practical Solutions for the Challenges of Today and Tomorrow
by Admin on 06-09-2025 at 2:59 pm

Featured Speakers:

  • Mike Borza, Scientist and Principal Security Technologist, Synopsys
  • Dana Neustadter, Senior Director of Product Management, Synopsys

As AI systems become increasingly vital across industries, ensuring their security and integrity is more critical – and challenging – than ever.

Join Synopsys in this … Read More


Synopsys Virtual Prototyping Day 2025

Synopsys Virtual Prototyping Day 2025
by Admin on 06-05-2025 at 7:28 pm

Join us for our 5th Annual Virtual Prototyping Day to learn how you can Shift-Left your development cycle with virtual prototypes. This popular series invites our customers and partners to speak about how they solve the challenges of highly complex SoC and multi-die designs using virtual prototypes.

Presenters this year include… Read More


Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP

Webinar: Implementing High Performance Real-Time Designs Using Synopsys ARC Processor IP
by Admin on 05-28-2025 at 12:56 pm

Featured Speakers:

  • Rick Furtner, Processor IP Applications Engineering, Synopsys

Why You Should Attend:

Join us for an insightful webinar where we delve into the latest advancements in Synopsys ARC Processor IP, designed to meet the stringent demands of real-time processing systems across industries. Gain valuable knowledge… Read More


Design-Technology Co-Optimization (DTCO) Accelerates Market Readiness of Angstrom-Scale Process Technologies

Design-Technology Co-Optimization (DTCO) Accelerates Market Readiness of Angstrom-Scale Process Technologies
by Kalar Rajendiran on 05-28-2025 at 10:00 am

Sassine Holding an 18A Test chip

Design-Technology Co-Optimization (DTCO) has been a foundational concept in semiconductor engineering for years. So, when Synopsys referenced DTCO in their April 2025 press release about enabling Angstrom-scale chip designs on Intel’s 18A and 18A-P process technologies, it may have sounded familiar—almost expected. … Read More


WEBINAR: PCIe 7.0? Understanding Why Now Is the Time to Transition

WEBINAR: PCIe 7.0? Understanding Why Now Is the Time to Transition
by Don Dingee on 05-27-2025 at 10:00 am

PCIe application interface options are the primary motivation for the PCIe 7.0 transition

PCIe is familiar to legions of PC users as a high-performance enabler for expansion slots, especially GPU-based graphics cards and M.2 SSDs. It connects higher-bandwidth networking adapters and niche applications like system expansion chassis in server environments. Each PCIe specification generation has provided a leap… Read More


Intel Foundry Delivers!

Intel Foundry Delivers!
by Daniel Nenni on 05-05-2025 at 10:00 am

Intel Foundry Direct Connect Hall 4 1024x576

Now that the dust has settled, I will give you my take on the Intel Foundry event. Some might call me a semiconductor event critic as I have attended hundreds of them over the last 40 years starting with the Design Automation Conference in 1984. Foundry events are my favorite because they really are the pulse of the semiconductor industry,… Read More


Webinar: Intel Presents: Modern EDA Solutions for Scalable Heterogeneous Systems

Webinar: Intel Presents: Modern EDA Solutions for Scalable Heterogeneous Systems
by Admin on 05-01-2025 at 3:18 pm

Featured Speakers:

  • Vivek Rajan, Sr. Principal Engineer, Intel
  • Amlendu Choubey, Sr. Director, Product Management, Synopsys

Why You Should Attend:

Rapidly emerging new workloads and disruptive architectures have highlighted the importance of advanced packaging and 3DIC technologies. The scaling of Moore’s Law has pushed… Read More


Webinar: Application-Specific Processors (ASIPs) for Wireless Communication SoCs

Webinar: Application-Specific Processors (ASIPs) for Wireless Communication SoCs
by Admin on 04-30-2025 at 2:19 pm

Featured Speakers:

  • Dr. Falco Munsche, Technical Product Marketing, Synopsys
  • Junsu Heo, SoC Design Lab, Konkuk University, Korea

Learn about:

  • Synopsys ASIP Designer, the industry-leading tool to explore, design and optimize application-specific processors
  • ASIP design methodology to address challenges in modern wireless
Read More

Scaling AI Infrastructure with Next-Gen Interconnects

Scaling AI Infrastructure with Next-Gen Interconnects
by Kalar Rajendiran on 04-29-2025 at 6:00 am

Data Centers Reimagined for Future of Gen AI

At the recent IPSoC Conference in Silicon Valley, Aparna Tarde gave a talk on the importance of Next-Gen Interconnects to scale AI infrastructure. Aparna is a Sr. Technical Product Manager at Synopsys. A synthesis of the salient points from her talk follows.

The rapid advancement of artificial intelligence (AI) is fundamentally… Read More


Webinar: AMD Presents: 3D Odyssey – Navigating the Depths of 3DIC Feasibility Analysis

Webinar: AMD Presents: 3D Odyssey – Navigating the Depths of 3DIC Feasibility Analysis
by Admin on 04-28-2025 at 12:44 pm

Date: May 21, 2025 10:00 AM PDT

Featured Speakers:

  • Nitin Navale, Principal Member of Technical Staff, AMD
  • Amlendu Choubey, Sr. Director, Product Management, Synopsys

Why You Should Attend:

With the rising demand for highly efficient 3DIC design and performance, it’s crucial to understand the IR and thermal landscape of a

Read More