Webinar: Static Verification of RTL DFT Connectivity – Getting it Right the First Time!

Webinar: Static Verification of RTL DFT Connectivity – Getting it Right the First Time!
by Admin on 09-04-2025 at 1:39 am

Featured Speakers:

  • Kiran Vittal, Synopsys
  • Ayush Goyal, Synopsys

As System-on-Chip (SoC) designs become increasingly complex, ensuring reliable Design-for-Test (DFT) connectivity at the RTL stage is more important than ever. This Synopsys webinar will demonstrate how static verification techniques, powered by TestMAX™

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eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success

eBook on Mastering AI Chip Complexity: Pathways to First-Pass Silicon Success
by Admin on 09-01-2025 at 8:00 am

MArtering AI Chip Complexity Synopsys

The rapid evolution of artificial intelligence (AI) is transforming industries, from autonomous vehicles to data centers, demanding unprecedented computational power and efficiency. As highlighted in Synopsys’ guide, the global AI chip market is projected to reach $383 billion by 2032, growing at a 38% CAGR. This … Read More


Free and Open Chip Design Tools: Opportunities, Challenges, and Outlook

Free and Open Chip Design Tools: Opportunities, Challenges, and Outlook
by Admin on 08-24-2025 at 10:00 am

OPen EDA Ecosystem 2025 SemiWiki

Designing semiconductor chips has traditionally been costly and controlled by a few major Electronic Design Automation (EDA) vendors—Cadence, Synopsys, and Siemens EDA who dominate with proprietary tools protected by NDAs and restrictive licenses. Fabrication also requires expensive, often export-controlled equipment.… Read More


448G: Ready or not, here it comes!

448G: Ready or not, here it comes!
by Kalar Rajendiran on 08-19-2025 at 6:00 am

448G Host Channel Topologies Analyzed

The march toward higher-speed networking continues to be guided by the same core objectives as has always been : increase data rates, lower latency, improve reliability, reduce power consumption, and maintain or extend reach while controlling cost. For the next generation of high-speed interconnects, these requirements … Read More


Synopsys FlexEDA: Revolutionizing Chip Design with Cloud and Pay-Per-Use

Synopsys FlexEDA: Revolutionizing Chip Design with Cloud and Pay-Per-Use
by Admin on 08-02-2025 at 4:00 pm

On July 9, 2025, Vikram Bhatia, head of product management for Synopsys’ cloud platform, and Sashi Obilisetty, his R&D engineering counterpart, presented a DACtv session on Synopsys FlexEDA, as seen in the YouTube video. Drawing from three and a half years of data, the session showcased how this cloud-based, pay-per-use… Read More


AI-Enhanced Chip Design: Pioneering the Future at DAC 2025

AI-Enhanced Chip Design: Pioneering the Future at DAC 2025
by Admin on 08-02-2025 at 2:00 pm

DAC 62 Systems on Chips

On July 9, 2025, a DACtv session illuminated the transformative role of artificial intelligence (AI) in chip design, as presented by Ankur Gupta of Siemens EDA in the YouTube video. The speaker explored how AI is revolutionizing electronic design automation (EDA), addressing the semiconductor industry’s challenges in managing… Read More


Microsoft Discovery Platform: Revolutionizing Chip Design and Scientific Research

Microsoft Discovery Platform: Revolutionizing Chip Design and Scientific Research
by Admin on 08-01-2025 at 6:00 am

DAC 62 Systems on Chips

At a recent conference session on July 9, 2025, Prashant Varshney, head of the Silicon and Physics Industry Vertical for Microsoft’s Discovery and Quantum Division, unveiled the transformative potential of the Microsoft Discovery Platform. This innovative platform, announced at Microsoft’s Build event, aims to redefine… Read More


cHBM for AI: Capabilities, Challenges, and Opportunities

cHBM for AI: Capabilities, Challenges, and Opportunities
by Kalar Rajendiran on 07-31-2025 at 6:00 am

cHBM Panelists at Synopsys Executive Forum

AI’s exponential growth is transforming semiconductor design—and memory is now as critical as compute. Multi-die architecture has emerged as the new frontier, and custom High Bandwidth Memory (cHBM) is fast becoming a cornerstone in this evolution. In a panel session at the Synopsys Executive Forum, leaders from AWS, Marvell,… Read More