Optimizing Prototype Debug

Optimizing Prototype Debug
by Bernard Murphy on 11-09-2016 at 7:00 am

In the spectrum of functional verification platforms – software-based simulation, emulation and FPGA-based prototyping – it is generally agreed that while speed shoots up by orders of magnitude (going left to right) ease of debug drops as performance rises and setup time increases rapidly, from close to nothing for simulation… Read More


Mentor at DVCon – Visualize This

Mentor at DVCon – Visualize This
by Bernard Murphy on 03-10-2016 at 12:00 pm

Steve Bailey entertained us during lunch on Tuesday with a talk on debug and visualization in the Mentor platform. Steve is based in Colorado, so had to spend the first part of his talk gloating about their Super Bowl win, but I guess he deserves that.

On a more technical note, he showed us a familiar survey they had completed with the… Read More