LIVE WEBINAR: Automating the Integration Workflow with IP Centric Design

LIVE WEBINAR: Automating the Integration Workflow with IP Centric Design
by Daniel Nenni on 04-09-2024 at 10:00 am

hip webinar automating integration workflow social

Subsystem and full-chip integration plays a crucial role in any project – particularly for large SoCs. Our upcoming webinar on April 30 confronts the typical challenges of this process and provides a detailed view into how IP centric  design can help you solve them. Join us to learn how transforming your design flow can help your… Read More


CadenceTECHTALK: Automated Verification for Cache Coherent RISC-V SoCs

CadenceTECHTALK: Automated Verification for Cache Coherent RISC-V SoCs
by Admin on 06-23-2023 at 1:05 pm

Date: Tuesday, July 18, 2023

Time: 11:00 AM PDT | 1:00 PM CDT | 2:00 PM EDT

RISC-V SoC design complexity continues to increase and create new verification challenges. Private caches, shared caches, and shared main memory create potential caches/memory coherency problems that require modern, automated verification approaches.… Read More


INNOVA PDM, a New Era for Planning and Tracking Chip Design Resources is Born

INNOVA PDM, a New Era for Planning and Tracking Chip Design Resources is Born
by Daniel Nenni on 12-01-2022 at 6:00 am

Innova PDM

No doubt that the design success of nowadays system on chips (SoCs) is directly linked to the success of cost control. More market opportunities are open for less expensive system on chips and electronic systems.

Both the design cost prediction and the resource tracking during the design process, are key to such a success

Predicting… Read More


ARC Processor Summit 2022 Your embedded edge starts here!

ARC Processor Summit 2022 Your embedded edge starts here!
by Synopsys on 08-15-2022 at 10:00 am

ARC Summit 2022

As embedded systems continue to become more complex and integrate greater functionality, SoC developers are faced with the challenge of developing more powerful, yet more energy-efficient devices. The processors used in these embedded applications must be efficient to deliver high levels of performance within limited power… Read More


The Lines Are Blurring Between System and Silicon. You’re Not Ready.

The Lines Are Blurring Between System and Silicon. You’re Not Ready.
by Daniel Nenni on 07-01-2022 at 8:00 am

3D Memory HBM Ansys

3D-ICs bring together multiple silicon dies into a single package that’s significantly larger and complex than traditional systems on a chip (SoCs). There’s no doubt these innovative designs are revolutionizing the semiconductor industry.

3D-ICs offer a variety of performance advantages over traditional SoCs. Because … Read More


WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)

WEBINAR: Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)
by Daniel Nenni on 03-01-2022 at 6:00 am

Mirabilis Webinar AI SoC

Among the multiple technologies that are poised to deliver substantial value in the future, Artificial Intelligence (AI) tops the list.  An IEEE survey showed that AI will drive the majority of innovation across almost every industry sector in the next one to five years.

As a result, the AI revolution is motivating the need for … Read More


DAC 2021 Wrap-up – S2C turns more than a few heads

DAC 2021 Wrap-up – S2C turns more than a few heads
by Ron Green on 12-20-2021 at 10:00 am

IMG 7547

Now that the 58th Design Automation Conference held this year in San Francisco has concluded, we take a minute to look back at the results and ascertain what it meant for our company.

Unfortunately, many popular tradeshows held in the time of Covid have suffered a drop in attendance, and DAC was no exception. Despite this however,… Read More


PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions

PCIe 6.0, LPDDR5, HBM2E and HBM3 Speed Adapters to FPGA Prototyping Solutions
by Kalar Rajendiran on 12-15-2021 at 6:00 am

Avery PCIe Speed Adapter IP at Work

We live in the age of big data. No matter how fast and complex modern SoCs are, it all comes down to how quickly data can get in and out that determines the system performance. And, there is a lot of data that today’s systems need to process. Naturally, system interfaces such as PCIe, DDR, HBM, etc., have been evolving rapidly too, to support… Read More


CEO Interview: Mo Faisal of Movellus

CEO Interview: Mo Faisal of Movellus
by Daniel Nenni on 12-01-2021 at 6:00 am

Mo Faisal Movellus

Prior to founding Movellus, Dr. Faisal held positions at semiconductor companies such as Intel and PMC Sierra. Faisal received his B.S. from the University of Waterloo, and his M.S. and Ph.D. from the University of Michigan, and holds several patents. Dr. Faisal was named a “Top 20 Entrepreneur” by the University of Michigan Zell… Read More


What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs

What’s Needed to Perform End-to-End Testing for 5G Open Radio Access Network SoCs
by Admin on 11-02-2021 at 5:59 pm

Tuesday, November 11, 2021 | 10:00-10:30 a.m. PST

Testing an O-RAN Radio Unit (O-RU) SoC at full scale implies sending realistic traffic, in conformance with current specifications and at the right time on the right interfaces to simulate complex scenarios and cover as many corner cases as possible. It requires a robust debug

Read More