Webinar: Mobile Device Companies Get New Sensor Interconnect Standard

Webinar: Mobile Device Companies Get New Sensor Interconnect Standard
by Daniel Payne on 09-04-2017 at 12:00 pm

I’ve been a mobile device user since the 1980’s when the Motorola brick phone was introduced, so I’ve seen an increasing amount of sensors added to each new generation of mobile phones over the years. One big challenge to both sensor companies and fabless semiconductor companies designing SoCs for mobile devices… Read More


The Transformation of Silvaco!

The Transformation of Silvaco!
by Daniel Nenni on 07-24-2017 at 7:00 am

Founded in 1984, Silvaco is now the largest privately held EDA company with a rich history including a recent transformation that is worth a blog if not a book. Coincidently, I started my career in Silicon Valley in 1984 and have had many dealings with Silvaco over the years including a personal relationship with Silvaco founder … Read More


DAC 2017: How Oracle does Reliability Simulation when designing SPARC

DAC 2017: How Oracle does Reliability Simulation when designing SPARC
by Daniel Payne on 06-27-2017 at 12:00 pm

Last week at #54DAC there was a talk by Michael Yu from the CAD group of Oracle who discussed how they designed their latest generation of SPARC chips, with an emphasis on the reliability simulations. The three features of the latest SPARC family of chips are:

  • Security in silicon
  • SQL in silicon
  • World’s fastest microprocessor
Read More

An Approach to TFT and FPD Design

An Approach to TFT and FPD Design
by Daniel Payne on 06-12-2017 at 4:00 pm

Webinars are a powerful way for engineers to get updated on EDA and IC design approaches, so I’m sharing what I viewed last month at a Silvaco webinar on TFT and FPD design. You probably are using a TFT LCD display in your TV, monitor, mobile phone, video game system, GPS device or projector. The custom IC design flow offered by… Read More


FD-SOI in Japan?

FD-SOI in Japan?
by Adele Hars on 05-27-2017 at 7:00 pm

If you want to get your finger on the Japan FD-SOI pulse, registration is still open for a free, two-day workshop in Tokyo this week organized by the SOI Consortium. This is the 3rd Annual SOI Tokyo Workshop, and there’s a really interesting line-up of speakers.

In case you’re wondering, Japan is doing FD-SOI. In fact… Read More


Webinar on TFT and FPD Design

Webinar on TFT and FPD Design
by Daniel Payne on 05-11-2017 at 12:00 pm

I knew that the acronym for TFT meant Thin Film Transistors, but I hadn’t heard that FPD stands for Flat Panel Detectors. It turns out the FPD are solid-state sensors used in x-ray applications, similar in operation to image sensors for digital photography and video. I’ll be attending and blogging about what I learn… Read More


Approaches for EM, IR and Thermal Analysis of ICs

Approaches for EM, IR and Thermal Analysis of ICs
by Daniel Payne on 04-26-2017 at 12:10 pm

As an engineer I’ve learned how to trade off using various EDA tools based on the accuracy requirements and the time available to complete a project. EDA vendors have been offering software tools to help us with reliability concerns like EM, IR drop and thermal analysis for several years now. Last week I attended a webinar … Read More


The Importance of EM, IR and Thermal Analysis for IC Design – Webinar

The Importance of EM, IR and Thermal Analysis for IC Design – Webinar
by Daniel Payne on 04-17-2017 at 4:00 pm

Designing an IC has both a logical and physical aspect to it, so while the logic in your next chip may be bug-free and meet the spec, how do you know if the physical layout will be reliable in terms of EM (electro-migration), IR (voltage drops) and thermal issues? EDA software once again comes to our rescue to perform the specific type… Read More