DesignCon has grown over the years to become a true system design show. The show’s tagline is WHERE THE CHIP MEETS TO BOARD. This is just the beginning. Besides the chip and the board there are all the challenges, opportunities, and options to get signals reliably propagated throughout the entire system. Power, signal integrity,… Read More
Title: KEYNOTE: Is Power Integrity the New Black Magic?
Date: Thursday, April 22, 2021
Time: 01:00 PM Eastern Daylight Time
Duration: 1 hour
Electronic Systems SI/PI Forum
KEYNOTE: Is Power Integrity the New Black Magic?
Sponsored by: Cadence
Presented by: Istvan Novak, Principal Signal and Power Integrity Engineer,
Dan and Mike are joined by Matt Burns, technical marketing manager at Samtec. Matt discusses the signal integrity challenges faced by system designers. The materials and protocols used for channels on a board, between boards on a rack and even between racks are discussed. Matt also touches on the work Samtec is doing with BattleBots.… Read More
It should come as no surprise that S2C would step out in front with a high-density FPGA prototyping hardware platform for users who would like to scale to large numbers of FPGAs and high performance. That’s exactly what they have done with their new Prodigy Logic Matrix family of FPGA prototyping products that S2C announced in December. … Read More
An exceptional customer experience starts before the sale. Successful companies realize it never ends. Dedicated post-sales support and a robust ecosystem for aftermarket product extensions are ingredients that tend to delight the customer. These comments are relevant in the consumer sector, but they apply to high tech as… Read More
Returning to basics, we’ll investigate the relationship of trace geometry to crosstalk in interconnect design, and draw some conclusions based on system constraints. Microstrip, stripline, and dual-stripline layer geometries will be examined,
I always enjoy welcoming new corporate members to the SemiWiki platform. Each company brings new technology, a different perspective and the opportunity for the SemiWiki community to hear about another aspect of chip design and manufacturing. But this introduction is different. This time, a new corporate member is opening … Read More
I recently watched a webinar given by eSilicon about its project to enhance its licensable solution for 56 and 112 Gigabit per second PAM4 & NRZ DSP-based SerDes family in 7nm. I am sure it was complicated enough to coordinate a webinar with a host, a moderator, and three different technical presenters – however when we are talking… Read More
A recent press release from eSilicon caught my eye. The company has been touting their 7nm SerDes quite a bit lately – reach, power, flexibility, things like that. While those capabilities are important, any high-performance chip needs to work in the context of the system, which usually contains technology from multiple sources.… Read More
