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Dan is joined by Jack Kang of SiFive. As a member of the founding team at SiFive, Jack oversees the Business Development, Customer Experience, and Corporate Marketing groups. He is responsible for strategic business initiatives and partnerships, technical pre-sales activities and post-sales support, and corporate messaging… Read More
Suresh is a technology executive with deep technical expertise in semiconductors, artificial intelligence, cybersecurity, internet-of-things, hardware, software, etc. He spent 20 years in the industry, most recently serving as an Executive Director for open-source zero-trust chip development at Technology Innovation… Read More
Synopsys has just announced that it has expanded its ARC processor portfolio to include a family of RISC-V processors. These will be branded under the ARC name as ARC-V and are expected to become available in 2024. This is a significant announcement which I attempt to unpack briefly below.
Why add RISC-V to the portfolio and why now?
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The automotive industry imposes stringent requirements on Functional Safety. For semiconductor companies involved in automotive chips and even further upstream in Silicon Intellectual Property (SIP), obtaining ISO 26262 certification is a fundamental requirement for product penetration into automotive applications.… Read More
Consider RISC-V ISA as a new ‘unforbidden fruit’. Unlike other fruits (ISAs) that grow in proprietary orchards, RISC-V is available to all, i.e. open-source. Much like a delicious fruit can be transformed into a wide array of delectable desserts, so can RISC-V be utilized to create a plethora of effective applications across … Read More
Dan is joined by Calista Redmond, CEO of RISC-V International. Prior to RISC-V International, Calista held a variety of roles at IBM, including vice president of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement… Read More
Mr. Venkata Sudhakar Simhadri is a serial entrepreneur with a proven track-record in the semiconductor industry. He was the Founder, President & CEO of Gigacom Semiconductor LLC & Founder / Director of Gigacom India (Both the Companies acquired by MosChip) and the driving force behind establishing IP licensing and … Read More
Synopsys Webinar | Thursday, September 21, 2023 | 10:00 a.m. Pacific
The ability to mix and match multiple ISA extensions and add user-defined ISA extensions makes RISC-V verification more challenging than conventional processor verification. This Synopsys webinar demonstrates the verification of standard RISC-V ISA extensions.
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RISC-V as an Instruction Set Architecture (ISA) has grown quickly in commercial importance and relevance since its release to the open community in 2015, attracting many IP vendors that now provide a variety of RTL cores. Roger Espasa, CEO and Founder of Semidynamics, has presented at RISC-V events on how their IP is customized… Read More
RISC-V have great adoption and momentum. One of the key benefits of RISC-V is the ability for SoC designers to extend its instruction sets to accelerate specific algorithms. Andes’ ACE (Andes Custom Extensions) allow customers to quickly create, prototype, validate and ultimately implement custom memories, dedicated ports… Read More
