Taking a Leap Forward to Prototype Billion Gate Designs

Taking a Leap Forward to Prototype Billion Gate Designs
by Pawan Fangaria on 05-26-2015 at 12:00 pm

It’s very common these days to hear about a billion gates SoC, but not without a huge design and verification effort and investment of resources. A complete verification of such an SoC needs several verification steps including software and hardware based methodologies that often are not sufficient to cover the whole SoC. In order… Read More


Accelerate Modern PCB Design and Manufacturing

Accelerate Modern PCB Design and Manufacturing
by Pawan Fangaria on 05-24-2015 at 12:00 pm

In modern electronic industry PCBs are required to accommodate highly dense circuits with large number of components and complex routing spaces. While the complexity is increasing, the time-to-market is decreasing. In such a scenario, there is no other option than to reduce the design time by employing innovative editing options… Read More


How to Push Mobile to Use PCI Express?

How to Push Mobile to Use PCI Express?
by Eric Esteve on 05-24-2015 at 7:00 am

By offering low-power PCI Express PHY solution for mobile application! To make it clear, we are not talking about Mobile Express (M-PCIe), but clearly about PCI Express protocol, including a PCIe Controller and a PCIe PHY. Initially developed to support internal connection between the CPU and the GPU in a PC, the technology has… Read More


Verification IP for PCIe and AXI4

Verification IP for PCIe and AXI4
by Daniel Payne on 03-26-2015 at 2:00 pm

Engineers love acronyms and my latest blog post has three acronyms in the title alone, so hopefully you are doing or considering SoC designs with the AMBA AXI4(Advanced eXtensible Interface 4) interface specification along with PCI Express (Peripheral Component Interconnect Express). One big motivation for using semiconductor… Read More


AMD Design IP Deal with Virage Logic… Oops… Synopsys

AMD Design IP Deal with Virage Logic… Oops… Synopsys
by Eric Esteve on 09-23-2014 at 9:59 am

Whoever has said that history never repeats itself should read this recent PR from AMD! The news can be summarized in three points:

  • Multi-year agreement gives AMD access to a range of Synopsys design IP including interface, memory compiler, logic library and analog IP for advanced FinFET process nodes
  • Synopsys acquires rights
Read More

Interface IP Protocols: Status

Interface IP Protocols: Status
by Eric Esteve on 09-16-2014 at 3:52 am

If your company develops Design IP to support well-known protocols like USB, PCIe, HDMI, DDRn memory controller, MIPI specification (and more), it’s crucial to know your competition, the market size by segment, and even more important the market potential by segment. The latest can be obtained by the Compound Annual Growth Rate… Read More


So Easy To Learn VIP Integration into UVM Environment

So Easy To Learn VIP Integration into UVM Environment
by Pawan Fangaria on 07-02-2014 at 7:30 am

It goes without saying that VIPs really play a Very Important Part in SoC verification today. It has created a significant semiconductor market segment in the fabless world of SoC and IP design & verification. In order to meet the aggressive time-to-market for IPs and SoCs, it’s imperative that readymade VIPs which are proven… Read More


Synopsys Galaxy Platform & Lynx Design System supports FD-SOI

Synopsys Galaxy Platform & Lynx Design System supports FD-SOI
by Eric Esteve on 06-05-2014 at 11:36 am

This is a new brick that Synopsys brings to build FD-SOI credibility. We have talked at Semiwiki about FD-SOI technology developed by the LETI and STM, and recently endorsed by Samsung Foundry, offering a more than credible second source to STM. And we have said that the FD-SOI introduction will need to be supported by EDA and IP vendors… Read More


High Quality PHY IPs Require Careful Management of Design Data and Processes

High Quality PHY IPs Require Careful Management of Design Data and Processes
by Pawan Fangaria on 01-29-2014 at 10:05 am

In last few years IP design has grown significantly compared to the rest of the semiconductor industry. There are newer IP start-ups opening across the world, particularly in India and China. Amid this rush, I wanted to understand the actual dynamics pushing this business and whether all of these IPs follow quality standards. … Read More


What’s new in the “Interface IP Survey” ?

What’s new in the “Interface IP Survey” ?
by Eric Esteve on 11-26-2013 at 9:27 am

The reader will find many updates in the “Interface IP Survey” from IPNEST, released in October 2013. Good question, as the IP market is a very fast moving one and the protocol based Interface IP, is moving even faster… exhibiting 20% growth rate in 2012, expected to grow with 10% CAGR between 2012 and 2017 to reach $700M. … Read More