Die-to-Die Interconnects using Bunch of Wires (BoW)

Die-to-Die Interconnects using Bunch of Wires (BoW)
by Daniel Payne on 09-21-2022 at 10:00 am

BoW min

Chiplets are a popular and trending topic in the semiconductor trade press, and I read about  SoC disaggregation at shows like ISSCC, Hot Chips, DAC and others. Once an SoC is disaggregated, the next challenge is deciding on the die-to-die interconnect approach. The Open Compute Project (OCP) started 10 years ago as a way to share… Read More


How System Companies are Re-shaping the Requirements for EDA

How System Companies are Re-shaping the Requirements for EDA
by Kalar Rajendiran on 01-24-2022 at 10:00 am

Panelists and Cadence Moderator

As the oldest and largest EDA conference, the Design Automation Conference (DAC) brings the best minds together to present, discuss, showcase and debate the latest and greatest advances in EDA. It accomplishes this in the form of technical papers, talks, company booths, product pavilions and panel discussions.

A key aspect … Read More