In early January 2026, Weebit Nano Ltd. (ASX: WBT) released a comprehensive report detailing its performance against the 2025 commercial and technical targets the company had set at its 2024 Annual General Meeting. The announcement highlighted significant progress in both business development and technology qualification,… Read More
Tag: jedec
Podcast EP325: How KIOXIA is Revolutionizing NAND FLASH Memory
Daniel is joined by Doug Wong, senior member of the technical staff at KIOXIA America, where he has contributed to the advancement of memory technologies since 1993. He began his career with KIOXIA in the company’s Memory Division (then part of Toshiba America) and has since focused on a broad range of memory solutions, including… Read More
cHBM for AI: Capabilities, Challenges, and Opportunities
AI’s exponential growth is transforming semiconductor design—and memory is now as critical as compute. Multi-die architecture has emerged as the new frontier, and custom High Bandwidth Memory (cHBM) is fast becoming a cornerstone in this evolution. In a panel session at the Synopsys Executive Forum, leaders from AWS, Marvell,… Read More
The Rise of the Chiplet
The emergence of chiplets as a technology is an inflection point in the semiconductor industry. The potential benefits of adopting a chiplets-based approach to implementing electronic systems are not a debate. Chiplets, which are smaller, pre-manufactured components can be combined to create larger systems, offering benefits… Read More
LIVE Webinar: Bridging Analog and Digital worlds at high speed with the JESD204 serial interface
To meet the increased demand for converter speed and resolution, JEDEC proposed the JESD204 standard describing a new efficient serial interface to handle data converters. In 2006, the JESD204 standard offered support for multiple data converters over a single lane with the following standard revisions; A, B, and C successively… Read More
Trust, but verify. How to catch peanut butter engineering before it spreads into your system — Part 1: Validation.
I will address this topic with two blog posts: validation (i.e. post silicon) — Part 1, and verification (pre-silicon) — Part 2 (coming soon!). In this blog post, I will focus on validation.
One of the upsides of using catalog chips that have been in the market for a long time and have ramped in substantial volumes is that… Read More
Semiconductor Reliability and Product Qualification
This week, we are continuing our discussion of various topics that Semitracks addresses in their training activities. One area that they focus on quite a bit is Semiconductor Reliability and Product Qualification.
One of the key activities that a Product Engineer will coordinate is the qualification of new products before they… Read More
How HBM Will Change SOC Design
High Bandwidth Memory (HBM) promises to do for electronic product design what high-rise buildings did for cities. Up until now, electronic circuits have suffered from the equivalent of suburban sprawl. HBM is a radical transformation of memory architecture that will have huge ripple effects on how SOC based electronics are … Read More
Start Your HBM 2.5D Design Today!
Next week there is a live seminar at the famed Computer Museum in Silicon Valley that you won’t want to miss. If you haven’t been to the Computer Museum here is what you are missing:… Read More
DDR4 is a complex interface to verify — assistance needed!
The design of parallel interfaces is supposed to be (comparatively) easy — e.g., follow a few printed circuit board routing guidelines; pay attention to data/clock/strobe signal lengths and shielding; ensure good current return paths (avoid discontinuities); match the terminating resistances to the PCB trace impedance;… Read More
