Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification

Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification
by Lauro Rizzatti on 06-12-2024 at 10:00 am

Reduce risk ensure compliance Figure 1
Prologue

Peter was running late for two reasons. First, he encountered unexpected heavy traffic and arrived ten minutes late for a crucial meeting with a customer to run a compliance test of his new 6G phone design prototyped on FPGAs. This prototype’s success was pivotal, as it could secure a significant purchase order.Read More


Altair® HPCWorks® Customer Days – Houston, TX

Altair® HPCWorks® Customer Days – Houston, TX
by Admin on 05-30-2024 at 4:01 pm

About

HPC enables the computation that makes capturing, producing, and optimizing energy possible. The global demand for energy from many varied sources is growing. Join us to learn how our solutions support robust computing performance and the biggest, most complex, and highest-throughput workloads for energy producers

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Webinar: Speed Up Your Electronic Component Design with HPC

Webinar: Speed Up Your Electronic Component Design with HPC
by Admin on 05-10-2024 at 2:20 pm

Electronic components design and their integration on PCBs involve complex simulations to accurately predict EM fields and forces. These simulations can be computationally intensive and time-consuming. High-performance computing (HPC) capability built into Ansys Maxwell core technology significantly accelerates

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TSMC 2024 China Technology Symposium

TSMC 2024 China Technology Symposium
by Admin on 05-01-2024 at 2:42 pm

Get the latest on:

  • TSMC’s industry-leading HPC, smartphone, IoT, and automotive platform solutions
  • TSMC’s advanced technology progress on 5nm, 4nm, 3nm, 2nm processes and beyond
  • TSMC’s specialty technology breakthroughs on ultra-low power, RF, embedded memory, power management, sensor technologies, and more
  • TSMC
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Webinar: Enabling SoC Security and Reliability for HPC, AI & IoT with NVM OTP IP in TSMC N5

Webinar: Enabling SoC Security and Reliability for HPC, AI & IoT with NVM OTP IP in TSMC N5
by Admin on 03-26-2024 at 2:23 pm

Hardware security is essential for high-performance computing (HPC), AI, and Edge IoT applications when designing SoCs in advanced process nodes. These designs include Gigabits of SRAM and require storing >16Kb of repair information to meet yield requirements. Designers are facing the challenges of creating secure,

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Accelerate AI Performance with 9G+ HBM3 System Solutions

Accelerate AI Performance with 9G+ HBM3 System Solutions
by Kalar Rajendiran on 03-06-2024 at 10:00 am

HBM3 PHY and Controller Memory Solution

In the technology realm of artificial intelligence (AI) and high-performance computing (HPC), the demand for higher throughput and efficiency has never been greater. To meet these evolving demands, innovative memory solutions have emerged as critical enablers, paving the way for transformative advancements in computing… Read More


New Emulation, Enterprise Prototyping and FPGA-based Prototyping Launched

New Emulation, Enterprise Prototyping and FPGA-based Prototyping Launched
by Daniel Payne on 02-26-2024 at 10:00 am

Veloce Strato CS min

General purpose CPUs have run most EDA tools quite well for many years now, but if you really want to accelerate something like simulation then you start to look at using specializedhardware accelerators. . Emulators came onto the scene around 1986 and the processing power has greatly increased over the years, mostly in response… Read More


RISC-V 64 bit IP for High Performance

RISC-V 64 bit IP for High Performance
by Daniel Payne on 08-30-2023 at 10:00 am

Atrevido min

RISC-V as an Instruction Set Architecture (ISA) has grown quickly in commercial importance and relevance since its release to the open community in 2015, attracting many IP vendors that now provide a variety of RTL cores. Roger Espasa, CEO and Founder of Semidynamics, has presented at RISC-V events on how their IP is customized… Read More


Qualitative Shift in RISC-V Targets Raises Verification Bar

Qualitative Shift in RISC-V Targets Raises Verification Bar
by Bernard Murphy on 08-02-2023 at 6:00 am

SVIPs

I had grown comfortable thinking about RISC-V as a cost-saving and more flexible alternative to Intel/AMD or Arm in embedded applications. Where clearly it is already doing very well. But following a discussion with Dave Kelf and Adnan Hamid of Breker, RISC-V goals have become much more ambitious, chasing the same big system applications… Read More


Keysight at #60DAC

Keysight at #60DAC
by Daniel Payne on 06-27-2023 at 10:00 am

ads hsd hpc design cloud min

Keysight EDA will have a large presence at this year’s DAC in San Francisco July 9-13. For a better understanding of what’s happening with Keysight EDA at DAC I talked to my contacts to learn that they have three main messages this year:

• Automate
• Collaborate
• Innovate

Demos: Booth 1531

You may recall that Keysight acquired CliosoftRead More