Alphawave Semi Unlocks 1.2 TBps Connectivity for HPC and AI Infrastructure with 9.2 Gbps HBM3E Subsystem

Alphawave Semi Unlocks 1.2 TBps Connectivity for HPC and AI Infrastructure with 9.2 Gbps HBM3E Subsystem
by Kalar Rajendiran on 08-27-2024 at 10:00 am

9.2Gbps HBM3E Subsystem

In the rapidly evolving fields of high-performance computing (HPC) and artificial intelligence (AI), reducing time to market is crucial for maintaining competitive advantage. HBM3E systems play a pivotal role in this regard, particularly for hyperscaler and data center infrastructure customers. Alphawave Semi’sRead More


Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure

Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure
by Kalar Rajendiran on 07-29-2024 at 6:00 am

Industry First, Multi Protocol IO Connectivity Chiplet

In the rapidly evolving landscape of high-performance computing (HPC) and artificial intelligence (AI), the demand for increased processing power, efficiency, and scalability is ever-growing. Traditional monolithic chip designs are increasingly unable to keep pace with these demands, leading to the emergence of chiplets… Read More


Empowering AI, Hyperscale and Data Center Connectivity with PAM4 SerDes Technology

Empowering AI, Hyperscale and Data Center Connectivity with PAM4 SerDes Technology
by Kalar Rajendiran on 07-25-2024 at 10:00 am

High Speed PAM4 SerDes Use Scenarios

The rapid expansion of data-intensive applications, such as artificial intelligence (AI), high-performance computing (HPC), and 5G, necessitates connectivity solutions capable of handling massive amounts of data with high efficiency and reliability. The advent of 224G/112G Serializer/Deserializer (SerDes) technology,… Read More


Keysight EDA at the 2024 Design Automation Conference

Keysight EDA at the 2024 Design Automation Conference
by Daniel Payne on 06-17-2024 at 8:00 am

DAC 2024 Banner

DAC starts June 24th and I can already feel the buzz of excitement building up as I receive updates from EDA vendors like Keysight EDA. Talking with Scott Seiden, Director Strategic Marketing, Keysight EDA Portfolio, I learned that they have the largest booth on the first floor, now that’s a statement that caught my attention. This… Read More


Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification

Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification
by Lauro Rizzatti on 06-12-2024 at 10:00 am

Reduce risk ensure compliance Figure 1
Prologue

Peter was running late for two reasons. First, he encountered unexpected heavy traffic and arrived ten minutes late for a crucial meeting with a customer to run a compliance test of his new 6G phone design prototyped on FPGAs. This prototype’s success was pivotal, as it could secure a significant purchase order.Read More


Accelerate AI Performance with 9G+ HBM3 System Solutions

Accelerate AI Performance with 9G+ HBM3 System Solutions
by Kalar Rajendiran on 03-06-2024 at 10:00 am

HBM3 PHY and Controller Memory Solution

In the technology realm of artificial intelligence (AI) and high-performance computing (HPC), the demand for higher throughput and efficiency has never been greater. To meet these evolving demands, innovative memory solutions have emerged as critical enablers, paving the way for transformative advancements in computing… Read More


New Emulation, Enterprise Prototyping and FPGA-based Prototyping Launched

New Emulation, Enterprise Prototyping and FPGA-based Prototyping Launched
by Daniel Payne on 02-26-2024 at 10:00 am

Veloce Strato CS min

General purpose CPUs have run most EDA tools quite well for many years now, but if you really want to accelerate something like simulation then you start to look at using specializedhardware accelerators. . Emulators came onto the scene around 1986 and the processing power has greatly increased over the years, mostly in response… Read More


RISC-V 64 bit IP for High Performance

RISC-V 64 bit IP for High Performance
by Daniel Payne on 08-30-2023 at 10:00 am

Atrevido min

RISC-V as an Instruction Set Architecture (ISA) has grown quickly in commercial importance and relevance since its release to the open community in 2015, attracting many IP vendors that now provide a variety of RTL cores. Roger Espasa, CEO and Founder of Semidynamics, has presented at RISC-V events on how their IP is customized… Read More


Qualitative Shift in RISC-V Targets Raises Verification Bar

Qualitative Shift in RISC-V Targets Raises Verification Bar
by Bernard Murphy on 08-02-2023 at 6:00 am

SVIPs

I had grown comfortable thinking about RISC-V as a cost-saving and more flexible alternative to Intel/AMD or Arm in embedded applications. Where clearly it is already doing very well. But following a discussion with Dave Kelf and Adnan Hamid of Breker, RISC-V goals have become much more ambitious, chasing the same big system applications… Read More


Keysight at #60DAC

Keysight at #60DAC
by Daniel Payne on 06-27-2023 at 10:00 am

ads hsd hpc design cloud min

Keysight EDA will have a large presence at this year’s DAC in San Francisco July 9-13. For a better understanding of what’s happening with Keysight EDA at DAC I talked to my contacts to learn that they have three main messages this year:

• Automate
• Collaborate
• Innovate

Demos: Booth 1531

You may recall that Keysight acquired CliosoftRead More