Can the NSA Get Into Your Chip?

Can the NSA Get Into Your Chip?
by Paul McLellan on 04-21-2014 at 2:49 am

At DVCon Lawrence Loh and Viktor Markus Purri gave a tutorial on Formally Verifying Security Aspects of SoC Designs. Lawrence is the direector of WW application engineering and Markus is an FAE who specializes in security verification.

I’m not going to attempt to summarize an entire half-day tutorial in under 1000 words,… Read More


A Brief History of Functional Verification

A Brief History of Functional Verification
by Paul McLellan on 04-13-2014 at 3:00 pm

Usually these brief history pieces are totally written by the SemiWiki blogger whose name is at the top. Often me since that was how I prototyped book chapters (buy). Well, OK, I did actually write this but it is completely cribbed from a presentation earlier this week by Wally Rhines who gave a sort of keynote at the announcement of… Read More


Jasper at DVCon and EJUG

Jasper at DVCon and EJUG
by Paul McLellan on 03-13-2014 at 7:05 pm

The Jasper European User Group meeting (EJUG) is coming up in a couple of weeks. It will be held in the Munich Hilton (which I have stayed in many times, the S-bahn from the airport pretty much stops in the basement) on April 2nd.

The schedule for the day is:
9:00 AM – Registration and continental breakfast
9:30 AM – Jasper… Read More


Synopsys Announces Verification Compiler

Synopsys Announces Verification Compiler
by Paul McLellan on 03-04-2014 at 8:00 am

Integration is often an underrated attribute of good tools, compared to raw performance and technology. But these days integration is differentiation (try telling that to your calculus teacher). Today at DVCon Synopsys announced Verification Compiler which integrates pretty much all of Synopsys’s verification technologies… Read More


Jasper Goes to DVCon

Jasper Goes to DVCon
by Paul McLellan on 02-02-2014 at 6:00 pm

As usual, since they are firmly in the verification space, Jasper will have a number of things going on at DVCon 2014 which is March 3-6th at the Doubletree in San Jose. In the exhibition hall they are at booth #402.

Jasper will be happy to talk to you about anything, I’m sure, but the focus this year is on the JasperGold Security… Read More


JasperGold COV App, the Swiss Army Knife for Verification

JasperGold COV App, the Swiss Army Knife for Verification
by Paul McLellan on 01-16-2014 at 12:55 am

At the Jasper Users Group meeting in October Rajeev Ranjan presented on the JasperGold COV App which he described as the Swiss army knife for verification. It comes in many sizes and contains many useful tools.

The primary goal of COV is to provide coverage metrics:

  • stimuli coverage: how restrictive is the design behavior under
Read More

Security Path Verification

Security Path Verification
by Paul McLellan on 12-16-2013 at 5:18 pm

Formal approaches and security are a perfect match since you really want to prove that there are no holes in your security, rather than just being fairly confident. At the recent Jasper User Group meeting, Victor Purri presented some case studies in security verification.

The Jasper Security Path Verification (SPV) App is used… Read More


The Pelican Has Landed: Formal on an Unannounced ARM Processor

The Pelican Has Landed: Formal on an Unannounced ARM Processor
by Paul McLellan on 11-10-2013 at 3:00 pm

At the Jasper Users’ Group, Alex Netterville of ARM presented about how ARM are using formal on an unannounced processor code-named Pelican. Don’t read the presentation trying to find out information about Pelican itself, there isn’t any. That wasn’t the topic. Alex has been using formal approaches… Read More


Using Formal to Find Bugs in ARM Microprocessors

Using Formal to Find Bugs in ARM Microprocessors
by Paul McLellan on 11-01-2013 at 12:35 am

2.5x ROI vs simulation. 25% of bugs found for only 10% of the overall verification cost. 36% of bugs in a current CPU project. These impressive results for formal analysis are what ARM’s Laurent Arditi reported at JUG 2013 after painstaking recording of metrics over several production programs.


As you can see from the above graph,… Read More


Kathryn: "Formal Will Dominate Verification"

Kathryn: "Formal Will Dominate Verification"
by Paul McLellan on 10-23-2013 at 4:16 pm

At the Jasper Users’ Group meeting, Kathryn presented the state of Jasper. The numbers are impressive. The company has grown at a CAGR of over 35% since 2007, which is 6 times faster than EDA as a whole. They have been profitable at 15-20% EBITDA for 14 consecutive quarters.

Jasper is focused on engaging deeply with a small number… Read More