Hear the latest advances from leading experts. Join colleagues in Strasbourg.
Hear research presented at this specialized European event for optical instrumentation with the latest advances in optical systems applications, materials, and processing. We look forward to seeing everyone in April.
Registration is open. The
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In the semiconductor industry High-Level Synthesis (HLS) and SystemC have become essential tools, allowing engineers to model complex hardware designs using familiar C/C++ constructs. Yet, despite the widespread adoption of these languages, the debugging workflows in hardware development lag far behind those in software… Read More
PIC Summit Europe 2025by Admin on 10-22-2025 at 3:23 am
Scaling Together in a Dynamic World
The photonic chip industry is reaching new heights – but scaling production, applications, and investments requires a united effort. As demand surges for high-speed, energy-efficient solutions, the question isn’t if photonic chips will revolutionise industries, but how fast we … Read More
Discover how the latest MEMS and imaging technologies are enabling next-level value creation across industries. Explore cutting-edge AI-enhanced sensing, data fusion, and their transformative impact on automotive, healthcare, and smart systems. Learn how these technologies are driving Europe’s leadership in the sensor… Read More
Join us for the 2025 TSMC OIP ECOSYSTEM FORUM
Get ready for an electrifying dive into the future of semiconductor design at the 2025 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn’t just an event; it’s a dynamic hub where the brightest minds converge to ignite the next wave of innovation.
As the AI revolution… Read More
Discover how the latest MEMS and imaging technologies are enabling next-level value creation across industries. Explore cutting-edge AI-enhanced sensing, data fusion, and their transformative impact on automotive, healthcare, and smart systems. Learn how these technologies are driving Europe’s leadership in … Read More
Pratik Mahajan, Synopsys VC Formal R&D Group Director, kicked off an absorbing event featuring talks from multiple customers in Europe. He spent some time on formal signoff, an important topic that I’m still not sure is fully understood. Answering the questions “OK, we did a bunch of formal checking but how does that affect… Read More
I just read Daniel Nenni’s blog titled “Is Silicon Valley Gridlock a Good Sign for Semiconductors?” Dan, there is no definitive answer to this, I mean in terms of semiconductors. Let me call it Semiconductor Gridlock in Silicon Valley. Yes it’s good because Silicon Valley promotes research, brings up innovative technology and… Read More
Jasper at DVCon and EJUGby Paul McLellan on 03-13-2014 at 7:05 pmCategories: EDA
The Jasper European User Group meeting (EJUG) is coming up in a couple of weeks. It will be held in the Munich Hilton (which I have stayed in many times, the S-bahn from the airport pretty much stops in the basement) on April 2nd.
The schedule for the day is:
9:00 AM – Registration and continental breakfast
9:30 AM – Jasper… Read More
