In the semiconductor industry High-Level Synthesis (HLS) and SystemC have become essential tools, allowing engineers to model complex hardware designs using familiar C/C++ constructs. Yet, despite the widespread adoption of these languages, the debugging workflows in hardware development lag far behind those in software… Read More
Tag: europe
TSMC Europe Technology Symposium
Join us to get the latest on:
- TSMC’s industry-leading HPC, Smartphones, IoT, and Automotive platform solutions
- TSMC’s advanced logic technology progress on 3nm, 2nm, A16, A14 processes and beyond
- TSMC 3DFabric® advanced silicon stacking and packaging technology advancement on TSMC-SoIC®, InFO, CoWoS®, and TSMC-SoW™
User2User Europe 2026
Join us in Munich where peer-delivered technical sessions were be shared across a breadth of topics so you can explore new concepts or dive deep in your core area of expertise with fellow like-minded professionals.
Speaker submissions now open!
About User2User
The User2User conference is your opportunity to learn, grow and connect… Read More
SPIE Photonics Europe 2026
Hear the latest advances from leading experts. Join colleagues in Strasbourg.
Hear research presented at this specialized European event for optical instrumentation with the latest advances in optical systems applications, materials, and processing. We look forward to seeing everyone in April.
Registration is open. The
Revolutionizing Hardware Design Debugging with Time Travel Technology
DATE 2026
Design, Automation and Test in Europe Conference |
The European Event for Electronic System Design & Test
Call for Papers
The DATE conference is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in hardware and software design, test, and manufacturing
VC Formal SIG Virtually Conferences in Europe
Pratik Mahajan, Synopsys VC Formal R&D Group Director, kicked off an absorbing event featuring talks from multiple customers in Europe. He spent some time on formal signoff, an important topic that I’m still not sure is fully understood. Answering the questions “OK, we did a bunch of formal checking but how does that affect… Read More
Semiconductor Usage Revolves Around Asia
I just read Daniel Nenni’s blog titled “Is Silicon Valley Gridlock a Good Sign for Semiconductors?” Dan, there is no definitive answer to this, I mean in terms of semiconductors. Let me call it Semiconductor Gridlock in Silicon Valley. Yes it’s good because Silicon Valley promotes research, brings up innovative technology and… Read More
Jasper at DVCon and EJUG
The Jasper European User Group meeting (EJUG) is coming up in a couple of weeks. It will be held in the Munich Hilton (which I have stayed in many times, the S-bahn from the airport pretty much stops in the basement) on April 2nd.
The schedule for the day is:
9:00 AM – Registration and continental breakfast
9:30 AM – Jasper… Read More
GSA European Executive Forum
The first week of June is DAC in Austin of course. But over in Europe, the Wednesday and Thursday of that week, June 5-6th is the GSA European Executive Forum, bringing C-level executives together from all over Europe. It actually runs from 2pm on Wednesday until about 2pm on Thursday including a VIP dinner on Wednesday evening sponsored… Read More