Registration is now open for the annual CEO Executive Outlook co-hosted by the ESD Alliance, a SEMI Technology Community, and Keysight Technologies.
It will be held Thursday, May 9, in Santa Clara, Calif., and features two high-profile executives –– Calista Redmond, CEO of RISC-V International, and Patrick Little, CEO of SiFive,… Read More
Security threats are a hot topic of discussion today as they can have a profound impact on the electronic infrastructure and devices that are the backbone of our global economies. It is also clear that these threats can be introduced during the design of the very devices that we rely on in our daily lives.
Chiplet-based design is … Read More
Maheen Hamid, a member of the ESD Alliance (a SEMI Technology Community) Governing Council and a member of SEMI’s North America Advisory Board, is an astute business executive. Together with her husband Adnan Hamid, they founded Breker Verification Systems, a company developing test synthesis solutions. She serves today … Read More
Plan ahead now because Friday, June 30, is the deadline to submit nominations for the Phil Kaufman Award and the Phil Kaufman Hall of Fame for anyone you think is deserving of these honors. If you haven’t given it any thought, please consider nominating someone.
Before we look at both and the nomination requirements, here’s a thumbnail… Read More
Anyone interested in learning about general trade compliance concepts or how export control and sanction regulations affect the electronic systems design ecosystem will want to attend the upcoming ESD Alliance export seminar. It will be hosted by Ada Loo, chair of the ESD Alliance Export Committee and Cadence’s Group Director… Read More
One of the first events on the 2023 EDA calendar is the Phil Kaufman Award ceremony and banquet honoring the 2022 recipient Dr. Giovanni De Micheli. The event, hosted by the Electronic System Design Alliance (ESD Alliance) and the IEEE Council on Electronic Design Automation (CEDA), will be held Thursday, February 23, starting… Read More
Chip design verification has long been a key component of any design project developing silicon intended to go into manufacturing. As designs become more complex, so does the manufacturing risk, and the focus on thorough verification becomes ever more critical.
Another dimension of complexity coming into play and considered… Read More
It’s not often our community is able to attend an in-person discussion where executives share their insights on industry trends, especially over the past two years as the pandemic swept across the globe.
Well, that’s about to change and I suggest you start jotting down questions as the ESD Alliance plans its first in-person CEO … Read More
Curvilinear Design Primer for Design, Packaging Communities
This interview was done by Bob Smith, Executive Director, ESD Alliance, a SEMI Technology Community.
Previously, Fujimura served as CTO at Cadence Design Systems and returned to Cadence for the second time through the acquisition of Simplex Solutions where he was… Read More
According to the ESD Alliance, the single biggest revenue category in our industry is for semiconductor IP, so the concept of IP reuse is firmly established as a way to get complex products to market more quickly and reducing risk. On the flip side, with hundreds or even thousands of IP blocks in a complex SoC, how does a team, division… Read More
