Tag: electronic design

Accellera at the 62nd Design Automation Conference – Luncheon Panel

Accellera at the 62nd Design Automation Conference – Luncheon Panel
by Admin on 05-12-2025 at 5:47 pm

“Can AI Cut Costs in Electronic Design & Verification While Accelerating Time-To-Market?”

Industry leaders will discuss the transformative role of AI in semiconductor design and verification. As AI rapidly evolves, its potential to reduce costs, shorten time-to-market and address impending talent shortages is becoming… Read More

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FD-SOI, FinFET, 3D in Monterey

FD-SOI, FinFET, 3D in Monterey
by Paul McLellan on 04-09-2014 at 5:40 pm
Categories: Foundries, STMicroelectronics

Last night the IEEE Silicon Valley Chapter had a panel session that was in some ways a preview of some of what will be discussed at the Electronic Design Process Symposium in Monterey next Thursday and Friday. At EDPS Herb Reiter organized a session on FinFET, 3DIC and FD-SOI (sort of how many buzzwords can you get into one set of titles).… Read More

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EDPS Monterey

EDPS Monterey
by Paul McLellan on 03-17-2012 at 8:00 am
Categories: EDA, Events

Every year in Monterey is a relatively small conference that looks at the design process, EDPS, the electronic design process symposium. I gave a keynote there a couple of years ago, but you don’t have to listen to me this time. The keynotes are from:

  • 1st day: Misha Buric, CTO of Altera, talking about SoC FPGAs and other things
… Read More