I switched to Aldec Active-HDL

I switched to Aldec Active-HDL
by Luke Miller on 02-12-2014 at 3:00 pm

I have written this before, but I was a ModelSim snob. That has changed after trying Active-HDL from Aldec. I have no plans on going back to ModelSim. You ask why? Well astute reader, great question. Unfortunately these blogs are text limited and there is no way to write about all the bells and whistles of Active-HDL. So before I continue,… Read More


Cadence Acquires Forte

Cadence Acquires Forte
by Paul McLellan on 02-05-2014 at 4:46 pm


Cadence today announced that it is acquiring Forte Design Systems. Forte was the earliest of the high-level synthesis (HLS) companies. There were earlier products. Synopsys had Behavioral Compiler and Cadence had a product whose name I forget (Visual Architect?), but both products were too early and were canceled. Cadence … Read More


iDRM for Complex Layout Searches and IP Protection!

iDRM for Complex Layout Searches and IP Protection!
by Daniel Nenni on 02-05-2014 at 8:00 am

iDRM (integrated design rule manager) from Sage-DA is the world’s first and only design rule compiler. As such it is used to develop and capture design rules graphically, and can be used by non-programmers to quickly capture very complex and shape dependent design rules and immediately generate a check for them. The tool… Read More


Jasper Goes to DVCon

Jasper Goes to DVCon
by Paul McLellan on 02-02-2014 at 6:00 pm

As usual, since they are firmly in the verification space, Jasper will have a number of things going on at DVCon 2014 which is March 3-6th at the Doubletree in San Jose. In the exhibition hall they are at booth #402.

Jasper will be happy to talk to you about anything, I’m sure, but the focus this year is on the JasperGold Security… Read More


PreEDAC Mixer

PreEDAC Mixer
by Paul McLellan on 02-02-2014 at 11:00 am

Get together with your fellow industry peers and insiders at the monthly EDAC Mixer, to the benefit of local charities. You don’t need to donate anything, you just show up and pay for your own drinks. A portion of the proceeds will go to local charities, this month to the Mountain View Educational Foundation (MVEF), a volunteer… Read More


RTL Sign-off – At an Edge to become a Standard

RTL Sign-off – At an Edge to become a Standard
by Pawan Fangaria on 02-01-2014 at 10:00 am


Ever since I have seen Atrenta’s SpyGlass platform providing a comprehensive set of tools across the semiconductor design paradigm, I felt the need for a common set of standards to evolve for sign-off at RTL level. Last December, when I read an EE Times articleof Piyush Sancheti, VP, Product Marketing at Atrenta, where he talks … Read More


First Verdi Interoperability Apps Developer Forum

First Verdi Interoperability Apps Developer Forum
by Paul McLellan on 01-30-2014 at 11:47 am

Way back when SpringSoft was still SpringSoft and not Synopsys they launched Verdi Interoperability Apps (VIA) and an exchange for users to share them open-source style. I wrote about it back in 2011 when it was announced. Today, Synopsys announced the first developer forum for VIA. It will be held at SNUG on Wednesday, March 26,… Read More


High Quality PHY IPs Require Careful Management of Design Data and Processes

High Quality PHY IPs Require Careful Management of Design Data and Processes
by Pawan Fangaria on 01-29-2014 at 10:05 am

In last few years IP design has grown significantly compared to the rest of the semiconductor industry. There are newer IP start-ups opening across the world, particularly in India and China. Amid this rush, I wanted to understand the actual dynamics pushing this business and whether all of these IPs follow quality standards. … Read More


CDNLive World Tour

CDNLive World Tour
by Paul McLellan on 01-28-2014 at 11:00 pm

CDNLive is becoming a real worldwide event, starting in March in San Jose and ending in November in Tel Aviv, Israel.

The complete schedule is:

  • March 11-12th, Santa Clara, California
  • May 19th-21st, Munich, Germany
  • July 15th, Seoul, Korea
  • August 15th, Shanghai, China
  • August 7th, Hsinchu, Taiwan
  • August 11-12th, Bangalore, India
Read More

The Semiconductor Landscape – III

The Semiconductor Landscape – III
by Pawan Fangaria on 01-20-2014 at 12:30 pm

In continuation to my earlier observations and anticipations (landscape1, landscape2) which came up to my expectations, I was further inspired to ponder over the macros of our ever growing semiconductor industry. We may argue the business is stagnating, we may argue that the pace of scaling is slowing, but when I look back at the… Read More