Mixed-signal design creates all sorts of interesting problems for implementation and verification flows, particularly when it comes to design for low power. We tend to think of mixed-signal as a few blocks like PLLs, ADCs and PHYs on the periphery of the design. Constrain and verify the digital power requirements up to analog … Read More
With the advent of SoCs, design abstractions and verification has moved up at the system level. It’s imperative that EDA moves up the value chain to start design automation at system level. The System Design Automation will be the new face of EDA in coming years.… Read More
I’m attending the 53rd Design Automation Conference (DAC) in Austin, Texas starting June 5th, and there are at least seven reasons that you should consider attending as well. For decades now DAC has been the premier place for all the players in our semiconductor ecosystem to get together: Academics, Commercial vendors … Read More
When I first heard about a foundry possibly licensing FD-SOI I would have bet it was SMIC in China. What better market for a low cost, low power, easy to manufacture alternative to FinFETs? The foundry of course was Samsung which also made complete sense since they have 28nm gate-first capacity that matches up nicely to 28nm FD-SOI.… Read More
In the 1999 comedy, The Spy Who Shagged Me, Dr. Evil laments about why he can’t have sharks with “laser beams” attached to their heads. I get the feeling that silicon photonic designers sometimes feel the same way about why they don’t yet have integrated on-chip laser light sources. While off-chip light… Read More
Process and device engineers are some of the unsung heroes in our semiconductor industry that have the daunting task of figuring out how to actually create a new process node that will fit some specific, market niche with sufficient yield to make their companies profitable and stand out from the competition. One such market segment… Read More
This was the best keynote lineup I can remember at a user group meeting. All four speakers are visionaries but from very different perspectives. The video of the event will be up later this month but from my first count the word “System(s)” was mentioned 32 times and the underlying message will transform the semiconductor industry… Read More
The prevailing industry trends are clear: (1) PCB and die package designs are becoming more complex, across both mobile and high-performance applications; (2) communication interface performance between chips (and their related protocols) is increasingly demanding to verify; (3) signal integrity and power integrity issues… Read More
With the coming onslaught of IoT designs from big companies and small, the opportunity for IoT FPGA prototyping deserves a closer look. This session will start off with a keynote “The Internet of Trust and a New Frontier For Exploration” and will be followed by a discussion with industry experts Don Dingee, Frank Schirrmeister,… Read More
If you’re in the chip biz in Silicon Valley, check out the SOI Consortium FD-SOI Symposium on April 13th in San Jose. They’ve been running these things since 2009, and I have to say that this one is the most comprehensive to date. Headliners include Cisco, Sony, NXP, SigmaDesigns, ARM, Ciena plus the big FD-SOI foundries,… Read More
