A Digital Experience
August 11-13, 2020
CadenceLIVE 2020 is Going Digital!
For the last fifteen years, CadenceLIVE Silicon Valley has brought together technology users, developers, and industry experts to connect, share ideas and best practices, and inspire design creativity.
As our top priority continues to be the health
In my 34 years in IC and EDA, it never ceases to amaze me as to how ingenious designers can be with what is given them. Mentor, a Siemens business, has released a wonderful white paper that is proof of this yet again. The white paper steps through how one of their customers, MEMSIC, used the Tanner tool suite to develop a combination CMOS… Read More
A lot of ink has been spilled regarding the impending tsunami of Internet Of Things (IOTs). It is certainly an interesting topic, and not just for geeks. As the next generation computing platform, IOT will see an explosion of connected device (wearables, intelligent refrigerators, smart thermostats, etc.), currently estimated… Read More
My engineering background includes designing at the transistor-level, so I was drawn to attend a webinar today presented by Tanner EDAand Incentia about Adding a Digital Block to an Analog Design. Many of the 30,000 users of Tanner tools have been doing AMS designs, so adding logic synthesis and static timing analysis from Incentia… Read More
As we move down into more and more advanced process nodes, the rules of how we test designs are having to change. One big challenge is the requirement to zoom in and fix problems by doing root cause analysis on test data alone, along with the rest of the design data such as detailed layout, optical proximity correction and so on. But without… Read More
Yesterday I attended some of the Cadence mixed-signal technology summit. The day ended with a panel session on Are We Closing the Gap Yet in Mixed-signal Design? Richard Goering moderated. The panelists were all mixed signal experts:
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Intel TSMC Update!