Intel and Cadence Collaborate to Advance the All-Important UCIe Standard

Intel and Cadence Collaborate to Advance the All-Important UCIe Standard
by Mike Gianfagna on 09-02-2024 at 10:00 am

Intel and Cadence Collaborate to Advance the All Important UCIe Standard

The Universal Chiplet Interconnect Express™ (UCIe™) 1.0 specification was announced in early 2022 and a UCIe 1.1 update was released on August 8, 2023. This open standard facilitates the heterogeneous integration of die-to-die link interconnects within the same package. This is a fancy way of saying the standard opens the door… Read More


Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!

Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!
by Eric Esteve on 04-19-2024 at 6:00 am

Top10 Table 2023

Design IP revenues had achieved $7.04B in 2023, with disparity between license, growing by 14% and royalty decreasing by 6%, and main categories. Processor (CPU, DSP, GPU & ISP) slightly growing by 3.4% when Physical (SRAM Memory Compiler, Flash Memory Compiler, Library and I/O, AMS, Wireless Interface) slightly decreasing… Read More


Synopsys Design IP for Modern SoCs and Multi-Die Systems

Synopsys Design IP for Modern SoCs and Multi-Die Systems
by Kalar Rajendiran on 04-11-2024 at 10:00 am

Synopsys IP Scale, a Sustainable Advantage

Semiconductor intellectual property (IP) plays a critical role in modern system-on-chip (SoC) designs. That’s not surprising given that modern SoCs are highly complex designs that leverage already proven building blocks such as processors, interfaces, foundational IP, on-chip bus fabrics, security IP, and others. This… Read More


Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%

Design IP Sales Grew 19.4% in 2021, confirm 2016-2021 CAGR of 9.8%
by Eric Esteve on 05-05-2022 at 6:00 am

Table IP 2020 2021 1

Design IP Sales reached $5.45B in 2021, or 19.4% YoY after 16% in 2020, on-sync with semiconductor growth of 26.2% in 2021 according to WSTS. IPnest has released the “Design IP Report” in May 2022, ranking IP vendors by category (CPU, DSP, GPU & ISP, Wired Interface, SRAM Memory Compiler, Flash Memory Compiler, Library and I/O,… Read More


Design and Verification IP: Insights From a SmartDV Insider

Design and Verification IP: Insights From a SmartDV Insider
by Kalar Rajendiran on 09-09-2021 at 10:00 am

SmartDV Range of IP Offerings

Just as SmartTV has become a household term, SmartDV has become a well-known name within semiconductor design and verification circles. SmartDV™ Technologies is the proven and trusted choice for Smart Design IP and a range of Verification Solutions™ from Verification IP, including assertion-based and post-silicon validation… Read More


The Quiet Giant in Verification IP and More

The Quiet Giant in Verification IP and More
by Mike Gianfagna on 04-21-2020 at 10:00 am

SmartDV Market Coverage

In the technology industry, we’re all used to the hype about the latest and greatest. Semiconductor IP participates in the over-drive news cycle from time to time as well. So, when I see a company that has real, solid credentials but has resisted the temptation to over-hype, it gets my attention. I had an experience like this recently… Read More


Top 3 Reasons Why Design IP Is Business Friendly

Top 3 Reasons Why Design IP Is Business Friendly
by Eric Esteve on 02-19-2019 at 7:00 am

The Design IP market is doing well, growing at higher CAGR that the semiconductor market it is serving, in fact 10% higher for 2007-2017! You may wonder why this IP market is so business friendly? I will try to answer and propose the top 3 reasons explaining this behavior. To name it: IP business is recurrent, external IP sourcing isRead More


Worldwide Design IP Revenue Grew 12.4% in 2017

Worldwide Design IP Revenue Grew 12.4% in 2017
by Daniel Nenni on 05-11-2018 at 7:00 am

When starting SemiWiki we focused on three market segments: EDA, IP, and the Foundries. Founding SemiWiki bloggers Daniel Payne and Paul McLellan were popular EDA bloggers with their own sites and I blogged about the foundries so we were able to combine our blogs and hit the ground running. For IP I recruited Dr. Eric Esteve who had… Read More


IP Vendors: Call for Contribution to the Design IP Report!

IP Vendors: Call for Contribution to the Design IP Report!
by Eric Esteve on 04-13-2017 at 12:00 pm

The EDA & IP industry enjoys high growth for the Design IP segment, but a detailed analysis tool is missing. IPnest will address this need in 2017, expecting the IP vendors’ contribution! If we consider the results posted last March by the ESD Alliance, the EDA (and IP) industry is doing extremely well, as the global revenue has… Read More


Top 10 Updates from the TSMC Technology Symposium, Part I

Top 10 Updates from the TSMC Technology Symposium, Part I
by Tom Dillinger on 03-22-2017 at 7:00 am

Last week, TSMC held their 23rd annual technical symposium in Santa Clara. In the Fall, TSMC conducts the OIP updates from EDA/IP partners and customers. The theme of the Spring symposium is solely on TSMC’s technology development status and the future roadmap. Indirectly, the presentations also provide insight into … Read More