Latest Pinpoint Release Tackles DRC and Trend Lines

Latest Pinpoint Release Tackles DRC and Trend Lines
by Don Dingee on 07-06-2016 at 4:00 pm

After reading previous SemiWiki coverage on Dassault Systèmes and their ENOVIA Pinpoint solution, one big item seemed missing: how does this thing actually work? With all due respect to our other bloggers who covered when Dassault Systèmes acquired Pinpoint from Tuscany Design Automation, why Qualcomm is using Pinpoint, and… Read More


Enterprise Design Management Engineered for SoCs

Enterprise Design Management Engineered for SoCs
by Don Dingee on 04-22-2016 at 4:00 pm

In my initial look at ClioSoft’s design management system created from the ground up for the semiconductor industry, I made the opening case for managing and reusing IP across an ASIC design organization. Let’s for a moment say we agree on the need for an enterprise software package to do design management… Read More


Managing and Reusing IP in a Build-Borrow-Buy Era

Managing and Reusing IP in a Build-Borrow-Buy Era
by Don Dingee on 04-01-2016 at 4:00 pm

Make-versus-buy inadequately describes what we do now in electronic systems design. We are on a continuum of design IP acquisition and use decisions, often with a portfolio of active projects and future projects depending on the outcome. Properly managing IP means adopting a build-borrow-buy mindset and tools capable of handling… Read More


Enterprise Design Management Comes of Age

Enterprise Design Management Comes of Age
by Tom Simon on 09-22-2015 at 12:00 pm

The motivations for having a data and process management system in place for semiconductor design have existed for a long time. I am reluctant to admit it, but I remember early efforts to do this back in the 80’s at Valid Logic. Cadence was also developing this capability in house through the early 90’s. Back then designs were much … Read More


Semiconductor Strategy – From Productivity to Profitability

Semiconductor Strategy – From Productivity to Profitability
by Pawan Fangaria on 03-08-2014 at 8:30 am

The semiconductor industry seems to be the most challenged in terms of cost of error; a delay of 3 months in product development cycle can reduce revenue by about 27% and that of 6 months can reduce it by almost half; competition is rife, pushing the products to next generation (with more functionality, low power, high performance,… Read More


IoT begets silicon, interoperability, and standards

IoT begets silicon, interoperability, and standards
by Don Dingee on 11-19-2013 at 5:00 pm

The Internet of Things is on every technology mind these days, but what does it mean for the EDA community? Dennis Brophy of Mentor Graphics says the billions of things we are hearing about will not happen unless we find a way to build a lot more things, efficient things, and connected things. He has more thoughts in our recent interview.… Read More