Managing the ASIC manufacturing is one of the biggest challenges of chip projects.
Building an ASIC supply chain requires specific expertise. Throughout the process you’ll be confronted with hundreds of decisions that will require specific knowledge in order to be addressed correctly, avoid costly mistakes and lose time. … Read More
Tue, Mar 17, 2020 11:00 AM – 12:00 PM MDT
As the traditional ASIC business disappears before our eyes with the recent divestitures and acquisitions, I have been asking questions amongst the fabless semiconductor ecosystem and am getting few answers.
Who or what is going to step in to enable start-ups and new to silicon systems companies with application specific chips?… Read More
We covered the ASIC business in Chapter 2 of our book “Fabless: The Transformation of the Semiconductor Industry” using VLSI Technology and eSilicon as shining examples. Neither of which now exist. The ASIC business model was a critical steppingstone in the transformation of the semiconductor industry. Many systems companies… Read More
Minimizing ASIC production costs is the goal of every company. The problem is that this requires extensive knowledge. You must understand the technical intricacies and the financial implications of multiple activities like wafer production, packaging and QA activities such as electrical tests.
Generally, the more your company… Read More
Today’s off-the-shelf FPGA based prototyping systems have established their value in every stage of the application specific integrated circuit (ASIC) and system-on-chip (SoC) design flow. Moving beyond traditional applications such as in-circuit testing and early software development, this technology has expanded … Read More
eFPGA stands for embedded Field Programmable Grid Arrays. An eFPGA is a programmable device like an FPGA but rather than being sold as a completed chip it is licensed as a semiconductor IP block. ASIC designers can license this IP and embed it into their own chips adding the flexibility of programmability at an incremental cost.… Read More
SystemVerilog (SV) has become the basis for verifying FPGA and ASIC designs. As the complexity of SOC designs grows, advanced verification methodology concepts such as: Constrained Random Stimulus, Functional Coverage, and Test Environment Reuse are needed at the system … Read More
Semiconductor chip package technologies have evolved throughout the years to the point where hundreds of package types are available today.
Most applications will require the more general, single-element packaging for integrated circuits and the other components such as resistors, capacitators, antenna etc. However,… Read More
The Design IP market is doing well, growing at higher CAGR that the semiconductor market it is serving, in fact 10% higher for 2007-2017! You may wonder why this IP market is so business friendly? I will try to answer and propose the top 3 reasons explaining this behavior. To name it: IP business is recurrent, external IP sourcing is… Read More
