Competition in the semiconductor product marketplace has grown increasingly difficult as suppliers constantly search for ways to differentiate their products. Customers expect low cost, problem-free product performance. Automotive manufacturers in particular expect zero defects as field failures can prove very costly.
Since no manufacturer is currently capable of producing zero defect products, this goal would seem unrealistic. However, the customer expects zero defects in the products they receive, not necessarily in the products as produced. This suggests that while defect reduction remains important, effective screening of latent defects is paramount.
Elevated voltage stress, or EVS testing provides a cost effective approach to screen out defects. Burn-In testing is used by some manufacturers to detect and remove latent defects that pass undetected through standard electrical test methods employed at the Supplier’s Wafer Sort and Final Test operations. However, Burn-In testing is extremely expensive and lasts days if not weeks to complete.
Many latent defects act to thin dielectric isolation between two conductors in the semiconductor device, such as in the gate oxide or intermetal dielectric. Since dielectric strength of these films is well understood, EVS testing can be used to detect and screen these defects to ensure surviving units last as long as needed in field use.
Consider the figure above. Two types of defect populations are plotted in weibull format. Population type 1 maintains straight line behavior from the first failure to the last with all defects occurring due to device wearout. These defects are not consequential since wearout occurs well beyond the useful life of the product. Population type 2, on the other hand, has multiple slopes with many extrinsic defects. These defects are cause for concern. The defects located in zone A fail at low charge levels and are likely removed during standard wafer sort or final testing at the component supplier. Those defects shown in zone B, conversely, would likely survive internal testing and possibly fail in field use as the cumulative charge (Q) increases.
To screen zone B latent defects, EVS testing can prove effective. The governing equation illustrating the role of EVS testing appears below.
In this example, the standard test voltage used at Wafer Sort is 5.2v and the EVS test voltage is 10 volts. As indicated, if a 3 sec EVS test is applied, the corresponding field lifetime is 189,467 years! Of course, testing at such an elevated voltage may not always be possible since other circuit devices may be damaged but the potential benefits of EVS testing is clear. Lower voltages and/or lesser test times can be employed to achieve the desired effect with more reasonable test times.
Follow the adventures of SemiWiki on LinkedIn HERE!Share this post via: