Sunday Night – you have to network at the EDAC kick-off party.… Read More
Photo and Video Overview of DAC 2012
Accellera 2024 End of Year UpdateFrom my viewpoint, standards organizations in semiconductor design…Read More
Synopsys Brings Multi-Die Integration Closer with its 3DIO IP Solution and 3DIC ToolsThere is ample evidence that technologies such as…Read More
Enhancing System Reliability with Digital Twins and Silicon Lifecycle Management (SLM)As industries become more reliant on advanced technologies,…Read More
Analog FastSPICE update at DAC
Paul Estrada, COO of Berkeley DA met with me on the final day of DAC to provide an update. BDA coined the phrase Analog FastSPICE and have continued to dominate that market segment in the world of SPICE circuit simulators.… Read More
Microsoft Messes Up Mobile Even More…and Already Went Thermonuclear
Ed wrote recently about Microsoft going thermonuclear. I think that they already did. Ed wrote about Microsoft’s tablet announcement. The second announcement is a sort of follow up to my blog on what will happen to Nokia.
Two big announcements, the first one is that Microsoft is going to produce its own tablet computers (MiPads … Read More
AMS Simulation Update from Mentor Graphics at DAC
I met with Jay Madiraju of Mentor Graphics on Wednesday at DAC to get an update on their AMS simulation products. We worked together at Mentor back when Mach TA was being developed as a Fast SPICE circuit simulator.… Read More
FinFET Standard Cells at DAC
Rajiv Bhateja, Dhrumil Gandhi and Neal Carney met with me at DAC on Wednesday to give an update on what’s new in 2012 for Tela Innovations, a provider of lithography optimized IP and tools. This team has a rich history in EDA and IP from companies like: ARM, Artisan, Mentor Graphics and Silicon Compilers.… Read More
TSMC Theater Presentation: Apache
At the TSMC Theater Apache (don’t forget, now a subsidary of Ansys) talked about Emerging Challenges for Power, Signal and Reliability Verification on 3D-IC and Silicon Interposer Designs. The more I see about the costs and challenges of 20/22nm and below, the more I think that these 3D and 2.5D approaches are going to be … Read More
Finding RTL Bugs Live Using Formal Techniques
Most of what you see at DAC is canned PowerPoint presentations, however on Tuesday afternoon I spotted a company called Oski Technology that was doing something almost unheard of – they had an engineer debugging a digital design from Nvidia using formal tools live. I later found out the engineer found 4 bugs in just three days… Read More
Electromagnetic Simulation Update from Nimbic
Dr. Raul Camposano, CEO of Nimbic talked with me on Wednesday at DAC to provide an update on what’s new with their electromagnetic simulation tools.… Read More
DesignSync update from Dassault Systems at DAC
At DAC on Wednesday Rick Stanton of Dassault Systems gave me an update on what’s new with DesignSync, a design data management tool offered since 1998. Rick and I both worked at Viewlogic in the 90’s along with Dennis Harmon who then founded Synchronicity, later acquired by Dassault Systems.… Read More
Webinar: how to reduce mobile device cost and board space with LLI
LLI Specification has been officially released by the MIPI Alliance, at the occasion of the Mobile World Congress in Barcelona, this year. As indicated by the name, the round-trip latency of the LLI inter-chip connection is fast enough for a mobile phone modem to share an application processor’s memory while maintaining… Read More
TSMC Unveils the World’s Most Advanced Logic Technology at IEDM