Bug localization continues to be a challenge for both bug triage and root-cause analysis. Agentic approaches suggest a way forward. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas.… Read More
Ceva’s next NeuPro generation opens new possibilities across AICeva is broadening the possibilities for AI silicon…Read More
How Allegro MicroSystems Increased OEE by Several Percentage Points with yieldHUB LiveAllegro MicroSystems’ experience with yieldHUB Live shows how…Read More
Interview with Sweta Gupta, VP of Engineering of Analog BitsSweta Gupta is the Vice President of Engineering…Read More
Using AI for Root Cause Analysis of Simulation FailuresI’ve been working with AMIQ EDA for almost…Read More
Agentic AI accelerates 3D IC engineering for the AI factory eraBy Sudarshan Deo, software R&D Manager for 3D…Read MoreWhy chip design needs industrial-grade EDA AI
By Niranjan Sitapure
Artificial intelligence (AI) is reshaping industries worldwide. Consumer-grade AI solutions are getting significant attention in the media for their creativity, speed, and accessibility—from ChatGPT and Meta’s AI app to Gemini for image creation, Sora for video, Sona for music, and Perplexity for web… Read More
Mixel Company Update 2025
Mixel, Inc., a longtime leader in mixed-signal and MIPI® interface IP, entered a new chapter in its history following its acquisition by Silvaco Group, Inc., a global provider of design software and semiconductor IP. The acquisition, completed earlier in 2025, marks a strategic move that combines Silvaco’s deep expertise in… Read More
Cloud-Accelerated EDA Development
By Nikhil Sharma, Sunghwan Son, Paul Mantey
The semiconductor industry faces an unprecedented crisis that threatens the very foundation of technological innovation. According to the latest Siemens EDA / Wilson Research Study, first-silicon success rates have plummeted to just 14%[1]—the lowest figure in more than twenty… Read More
A Tour of Advanced Data Conversion with Alphacore
There is always a lot of buzz about advanced AI workloads at trade shows. How to train them and how to run them. Advanced chip and multi-die designs are how AI is brought to life, so it was a perfect fit for discussion at a show. But there is another side of this discussion. Much of the work going on in AI workloads has to do with processing… Read More
Video EP12: How Mach42 is Changing Analog Verification with Antun Domic
In this episode of the Semiconductor Insiders video series, Dan is joined by Antun Domic, who discusses Mach42’s work on AI and analog verification. Antun covers many aspects of analog/AMS verification and how Mach42’s unique AI-fueled approach provides significant benefits. He explains the balance of speed … Read More
Silicon Creations Company Update 2025
WEBINAR: Is Agentic AI the Future of EDA?
The semiconductor industry is entering a transformative era, and few trends are generating more discussion or confusion than Agentic AI. From autonomous design exploration to next-generation verification strategies, Agentic AI promises dramatic changes in how chips are conceived, validated, and delivered. But as with … Read More
Semiconductors Up Over 20% in 2025
The world semiconductor market was $208 billion in third-quarter 2025, according to WSTS. This marks the first time the market has been above $200 billion. 3Q 2025 was up 15.8% from 2Q 2025, the highest quarter-to-quarter growth since 19.9% in 2Q 2009. 3Q 2025 was up 25.1% from 3Q 2024, the highest growth versus a year earlier since… Read More
FPGA Prototyping in Practice: Addressing Peripheral Connectivity Challenges
Modern chip design verification often encounters challenges when connecting peripherals, primarily due to drastic differences in operating speed or hardware limitations. Designs running on hardware emulators or FPGA prototyping platforms typically operate at clock frequencies of tens of megahertz, and in some cases even… Read More


The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival