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By Dr. Thang Minh Tran, CEO/CTO Simplex Micro
Today’s AI accelerators—whether built for massive data centers or low-power edge devices—face a common set of challenges: deep pipelines, complex data dependencies, and the high cost of speculative execution. These same concerns have long been familiar in high-frequency microprocessor… Read More
Noah Sturcken is a Founder and CEO of Ferric with over 40 patents issued and 15 publications on Integrated Voltage Regulators. Noah leads Ferric with focus on business development, marketing and new technology development. Noah previously worked at AMD R&D Lab where he developed Integrated Voltage Regulator (IVR) technology.… Read More
Bruce Caryl is a Product Specialist with Siemens EDA
The most common way to evaluate a power distribution network is to look at its impedance over the effective frequency range. A lower impedance will produce less noise when transient current is demanded by the IC output buffers. However, this transient current needs to be provided… Read More
The topics of stochastics and blur in EUV lithography has been examined by myself for quite some time now [1,2], but I am happy to see that others are pursuing this direction seriously as well [3]. As advanced node half-pitch dimensions approach 10 nm and smaller, the size of molecules in the resist becomes impossible to ignore for… Read More
Dan is joined by Andrea Gallo, CEO of RISC-V International, the non-profit home of the RISC-V instruction set architecture standard, related specifications, and stakeholder community. Prior to joining RISC-V International, Gallo worked in leadership roles at Linaro for over a decade. He built Linaro’s server engineering… Read More
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What if you could reduce power and extend chip lifetime, without compromising performance? We all know the importance of power optimization for advanced SoCs. Thanks to the massive build out of AI workloads, power consumption has gone from a cost or cooling headache to an existential threat to the planet, if current power consumptions… Read More
Can a combination of learning-based surrogate models plus reachability analysis provide first pass insight into extrema in circuit behavior more quickly than would be practical through Monte-Carlo analysis? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys… Read More
Yannick founded EUMETRYS in 2012. He began his engineering career for Schlumberger in 1998 in West Africa and then became an applications engineer for the company from 2000 to 2004 in the semiconductor sector. In 2004, he joined Soluris as a field service engineer until 2006, then Nanometrics as a technical product support specialist.… Read More
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Why Huawei Says It Will Match TSMC’s Most Advanced Chips by 2031