Think Quantum Computing is Hype? Mastercard Begs to DisagreeJust got an opportunity to write a blog…Read More
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There is always a lot of buzz about advanced AI workloads at trade shows. How to train them and how to run them. Advanced chip and multi-die designs are how AI is brought to life, so it was a perfect fit for discussion at a show. But there is another side of this discussion. Much of the work going on in AI workloads has to do with processing… Read More
In a move poised to accelerate the integration of open-source processor architectures into resource-constrained devices, semiconductor IP provider CAST, Inc. unveiled its Catalyst™ Program at the RISC-V Summit in Santa Clara, California. This initiative addresses a persistent pain point for embedded system developers:… Read More
Daniel is joined by Alex Burlak is Vice President of Test & Analytics at proteanTecs. With combined expertise in production testing and data analytics of ICs and system products, Alex joined proteanTecs in October, 2018. Before joining the company, Alex held a Senior Director of Interconnect and Silicon Photonics Product… Read More
Alex Demkov is co-founder and CEO of La Luce Cristallina. He is a distinguished figure in the field of materials physics, serving as a Professor at the University of Texas at Austin. With a prolific career marked by notable achievements, Alex boasts an impressive portfolio of 10 U.S. patents and many patent applications, showcasing… Read More
Today, Perforce IPLM stands at the intersection of data management, automation, and collaboration, shaping the way companies design the next generation of chips and systems. Looking ahead, its evolution will reflect the growing convergence of hardware, software, and AI-driven engineering.
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More
One technical topic I always find intriguing is the availability of links between documentation and chip design. It used to be simple: there weren’t any. Architects wrote a specification (spec) in text, in Word if they had PCs, or using “troff” or a similar format if they were limited to Unix platforms. Then the hardware designers… Read More
The paper highlights how Fully Depleted Silicon-On-Insulator (FD-SOI) technology provides a robust defense against Laser Fault Injection (LFI), a precise, laboratory-grade attack method that can compromise cryptographic and safety-critical hardware. As vehicles become increasingly digital and connected, with dozens… Read More
Daniel is joined by Dave Eggleston is senior business development manager at Microchip with a focus on licensing SST SuperFlash technology. Dave’s extensive background in Flash, MRAM, RRAM, and storage is built on 30+ years of industry experience. This includes serving as VP of Embedded Memory at GLOBALFOUNDRIES, CEO… Read More
At a DAC Accellera panel this year there was some discussion on cross-company collaboration in training. The theory is that more collaboration would mean a larger training set and therefore higher accuracy in GenAI (for example in RTL generation). But semiconductor companies are very protective of their data and reports of copyrighted… Read More
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