Synopsys Advances Hardware Assisted Verification for the AI EraAt the 2026 Synopsys Converge Event, Synopsys announced…Read More
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The SPIE Advanced Lithography + Patterning Symposium recently concluded. This is a popular event where leading researchers gather. Challenges such as optical and EUV lithography, patterning technologies, metrology, and process integration for semiconductor manufacturing and adjacent applications are all covered. This… Read More
In the realm of extreme ultraviolet (EUV) lithography, metal oxide resists (MORs) have emerged as promising candidates for advanced semiconductor patterning. However, their stability poses challenges, particularly interactions with clean-room environments like humidity and airborne molecular contaminants (AMCs) … Read More
Mohammad Rastegari is a prominent AI researcher and entrepreneur currently serving as the CEO and Co-Founder of Elastix.AI. Based in the Greater Seattle Area, he also holds the position of Affiliate Assistant Professor at the University of Washington’s Electrical & Computer Engineering Department. His professional… Read More
The majority of my 40+ year career has been spent managing the relationship between leading-edge semiconductor design and manufacture, working with just about every commercial foundry and top customer in one way or another. It’s my thing—it fascinates me. I’m also a fan of disruption, and the latest disruptions the semiconductor… Read More
Daniel is joined by Dr. Debendra Das Sharma, a Senior Fellow and Chief I/O architect in the Data Platforms and Artificial Intelligence Group at Intel. He is a member of the National Academy of Engineering (NAE), Fellow of IEEE, and Fellow of International Academy of AI Sciences. He is a leading expert on I/O subsystem and interface… Read More
Agentic AI emerges in this Synopsys Converge keynote not as a futuristic add-on, but as a practical response to the growing complexity of engineering. In the speaker’s view, the traditional way of designing chips, systems, and intelligent products is no longer sufficient for the era of physical AI. Engineers are now dealing with… Read More
The semiconductor manufacturing industry has hit a new era of data intensity. We know that we need to look at alternatives to silicon and that electrical interconnects are unable to keep pace. We know we need to design more chiplets and alter microchip architecture. But how much data are we talking specifically, and how much
Right before the Synopsys Converge Keynote I caught an interview with Ravi Subramanian, Chief Product Management Officer at Synopsys, which highlights several important trends shaping the future of AI, semiconductor technology, and engineering. His discussion focuses on how the worlds of silicon design and system engineering… Read More
Axiomise has recently launched a new verification tool called nocProve which will transform how Network-on-Chip designs are validated in modern hardware development, absolutely.
The tool is designed to be the first configurable formal verification application specifically created for NoC implementations. It addresses… Read More
The Chiplet Summit recently concluded. Multi-die heterogeneous design is a hot topic these days and chiplets are a key enabler for this trend. The conference was noticeably larger this year. There were many presentations and exhibits that focused on areas such as how to design chiplets, what standards are important, how to integrate… Read More
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Musk’s Orbital Compute Vision: TERAFAB and the End of the Terrestrial Data Center