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Podcast EP35: Benefits of FPGA Based Prototyping

Podcast EP35: Benefits of FPGA Based Prototyping
by Daniel Nenni on 08-27-2021 at 10:00 am

Dan is joined by Ying Chen, VP of marketing & international sales at S2C. Dan and Ying explore the various uses and benefits of FPGA-based prototyping, including the different architectures available and cloud access.

Mr. Chen is a dynamic technologist with over 23 years of technical and business experiences in digital … Read More


CEO Interview: Veerbhan Kheterpal of Quadric.io

CEO Interview: Veerbhan Kheterpal of Quadric.io
by Daniel Nenni on 08-27-2021 at 6:00 am

veerbhan kheterpal

It was my pleasure to meet Veerbhan Kheterpal. Veerbhan has founded three technology companies and has full stack expertise spanning software to silicon across Edge & Datacenter applications. Currently, he is a CEO & co-founder of quadric.io, a company that has created a new processor architecture for high performance… Read More


Side Channel Analysis at RTL. Innovation in Verification

Side Channel Analysis at RTL. Innovation in Verification
by Bernard Murphy on 08-26-2021 at 6:00 am

Innovation New

Roots of trust can’t prevent attacks through side-channels which monitor total power consumption or execution timing. Correcting weakness to such attacks requires pre-silicon vulnerability analysis. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO)… Read More


Using Machine Learning to Improve EDA Tool Flow Results

Using Machine Learning to Improve EDA Tool Flow Results
by Daniel Payne on 08-25-2021 at 10:00 am

gajski kuhn

Back in 2020 I first learned from Synopsys about how they had engineered a better way to do optimize layouts on digital designs by using machine learning techniques, instead of relying upon manual approaches. The product was named DSO.ai, standing for Design Space Optimization, and it produced a more optimal floor-plan in less… Read More


Expanding Intel’s Foundry Partnerships: A Critical Piece of IDM 2.0

Expanding Intel’s Foundry Partnerships: A Critical Piece of IDM 2.0
by Daniel Nenni on 08-25-2021 at 6:00 am

Stuart Pann SemiWiki

One of the career Intel employees (33+ years) that Pat Gelsinger brought back is Stuart Pann. Stuart is now the Senior Vice President of the Intel Corporate Planning Group. He does not have direct foundry experience but he certainly knows Intel and Pat so it will be interesting to see where this goes.

Stuart recently penned an article… Read More


Symmetry Requirements Becoming More Important and Challenging

Symmetry Requirements Becoming More Important and Challenging
by Tom Simon on 08-24-2021 at 10:00 am

Symmetry across the design flow

Humans certainly have always had an aesthetic preference for symmetry. We also see symmetry showing up frequently in nature. The importance of symmetry in electronic designs has been apparent for decades. There are a host of analog structures that require balanced layout. For instance, these include differential pairs and … Read More


Ultra-Wide Band Finds New Relevance

Ultra-Wide Band Finds New Relevance
by Bernard Murphy on 08-24-2021 at 6:00 am

smart keyless entry min

Do you use Tile or other Bluetooth tracking devices? If so, you know that such devices, attached to your car keys or wallet, created a small stir. A way to track down something you can’t find. Very neat but hardly revolutionary. One of those consumer tchotchkes as likely to be handed out as trade-show swag as purchased.

So why did Apple… Read More


Deploying EDA Applications in the Cloud

Deploying EDA Applications in the Cloud
by Kalar Rajendiran on 08-23-2021 at 10:00 am

Rescale EDA Features

A company that gets its products to market first stands to gain a competitive edge in the market place. This is even more so in the highly competitive and innovative semiconductor industry. At the same time, designing chips is a very challenging task that involves iterative steps that are computation, memory and storage intensive.… Read More


Cadence Tempus Update Promises to Transform Timing Signoff User Experience

Cadence Tempus Update Promises to Transform Timing Signoff User Experience
by Tom Simon on 08-23-2021 at 6:00 am

Tempus With SmartHub for Timing Signoff

Cadence invests heavily in the development of their Tempus Timing Signoff Solution due to its importance in the SoC design flow. I recently had a discussion on the topic of the most recent Tempus update with Brandon Bautz, senior product management group director in the Digital & Signoff Group, and Hitendra Divecha, product… Read More


Are We Done with ICE Vehicles?

Are We Done with ICE Vehicles?
by Roger C. Lanctot on 08-22-2021 at 10:00 am

Are We Done with ICE Vehicles?

U.S. President Joe Biden served notice on the automotive industry that he expects auto makers to shift 50% of vehicle sales to those with electric power trains by 2030. Of course, he included plug-in hybrids in the mix – perhaps in deference to Toyota – and Tesla was oddly absent from the announcement made on the South… Read More