Design & Reuse recently held its IP-SoC Days event at the Hyatt Regency in Santa Clara. Advanced IP is now the fuel for a great deal of innovation in semiconductor design. This popular event allows IP providers to highlight the latest products and services and share a vision of the future. IP consumers can easily get updates on… Read More



Impact of Varying Electron Blur and Yield on Stochastic Fluctuations in EUV Resist
A comprehensive update to the EUV stochastic image model
In extreme ultraviolet (EUV) lithography, photoelectron/secondary electron blur and secondary electron yield are known to drive stochastic fluctuations in the resist [1-3], leading to the formation of random defects and the degradation of pattern fidelity at advanced
Executive Interview with Koji Motomori, Senior Director of Marketing and Business Development at Numem
Koji Motomori is a seasoned business leader and technologist with 30+ years of experience in semiconductors, AI, embedded systems, data centers, mobile, and memory solutions, backed by an engineering background. Over 26 years at Intel, he drove strategic growth initiatives, securing $2B+ in contracts with OEMs and partners.… Read More
Video EP3: A Discussion of Challenges and Strategies for Heterogeneous 3D Integration with Anna Fontanelli
In this episode of the Semiconductor Insiders video series, Dan is joined by Anna Fontanelli, founder and CEO of MZ Technologies. Anna explains some of the substantial challenges associated with heterogeneous 3D integration. Dan then begins to explore some of the capabilities of GenioEVO, the first integrated chiplet/package… Read More
CEO Interview with Richard Hegberg of Caspia Technologies
Rick has a long and diverse career in the semiconductor industry. He began as VP of sales at Lucent Microelectronics. He has held executive roles at several high-profile companies and participated in several acquisitions along the way. These include NetApp, SanDisk/WD, Atheros/Qualcomm, Numonyx/Micron, ATI/AMD, and VLSI… Read More
TSMC Describes Technology Innovation Beyond A14
The inaugural event for the 2025 TSMC Technology Symposium recently concluded in Santa Clara, California. This will be followed by events around the world over the next two months. We have summarized information from this event regarding process technology innovation and advanced packaging innovation. Overall, the A14 process… Read More
SNUG 2025: A Watershed Moment for EDA – Part 2
At this year’s SNUG (Synopsys Users Group) conference, Richard Ho, Head of Hardware, OpenAI, delivered the second keynote, titled “Scaling Compute for the Age of Intelligence.” In his presentation, Richard guided the audience through the transformative trends and implications of the intelligence era now unfolding before… Read More
Emerging NVM Technologies: ReRAM Gains Visibility in 2024 Industry Survey
A recent survey of more than 120 anonymous semiconductor professionals offers a grounded view of how the industry is evaluating non-volatile memory (NVM) technologies—and where things may be heading next.
The 2024 NVM Survey, run in late 2024 and promoted through various semiconductor-related platforms and portals including… Read More
Feeding the Beast: The Real Cost of Speculative Execution in AI Data Centers
For decades, speculative execution was a brilliant solution to a fundamental bottleneck: CPUs were fast, but memory access was slow. Rather than wait idly, processors guessed the next instruction or data fetch and executed it ‘just in case.’ Speculative execution traces its lineage back to Robert Tomasulo’s work… Read More
LLMs Raise Game in Assertion Gen. Innovation in Verification
LLMs are already simplifying assertion generation but still depend on human-generated natural language prompts. Can LLMs go further, drawing semantic guidance from the RTL and domain-specific training? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot