Senior ASIC Digital Design Engineer

Job Description and Requirements

The Synopsys DesignWare team in Blanchardstown, West Dublin is responsible for the design, verification, validation and productization of many complex IP blocks for the Synopsys DesignWare Library and DesignWare Cores such as PCIe Express, DDR memory and protocol controllers and more.

The successful candidate will work on new product development for PCI Express Controllers. As these designs are part of the DesignWare portfolio it presents the opportunity for the successful candidate to have their work used in many of the leading products that are developed by Synopsys customers. We develop best in class designs using the latest best practice in verification to ensure their quality and we need the right people to keep making this happen. As a worldwide organization sometimes short term travel is required.

The ideal candidate will have:   

• Successful track record in project work. 
• Design and/or verification experience. 
• Experience of Verilog/VHDL. 
• Experience of System Verilog, VMM/OVM/UVM
• Knowledge of IC Design flows. 
• Unix, Perl and TCL Scripting Knowledge. 
• Knowledge of ARM/DDR/PCI Express protocols would be advantageous
• Good problem solving and communication skills.