Principal Engineer

Job Description: Apply the principles of SoC (System on Chip) and high-speed low-power VLSI (Very Large Scaled Integrated-circuits) design to participate in the chip physical design and implementation for TSMC’s advanced processing technology, including block level floor plan, clock tree synthesis, place and route, RC extraction, static timing analysis (STA) and timing closure, IR/EM (voltage drop analysis, voltage/electro-migration) analysis and fix, DRC/LVS/ERC (Design Rule Check/Layout Versus Schematic/Electrical Rule Check) clean up, and tape-out sign off, using standard EDA (Electronics Design Automation) tools and Perl/TCL language programming. Provide customer onsite support.

Requirements: Bachelor’s degree or foreign equivalent in Electrical or Electronic Engineering, and five (5) years of experience in a related position.

Work experience must have included: Experience in full-cycle physical design implementations and PPA (Power, Performance, Area) analysis of CPU blocks in lower technologies, including N7/N5 and lower; Proficiency in hdl languages verilog and vhdl, and knowledge of scripting languages tcl and perl; and Knowledge of electrical and electronic engineering principles of Circuit Theory, Solid State Devices and Circuit, Digital Electronic Circuits, VLSI Circuits and Systems, and Electronic Design Automation.

Work site: TSMC Technology, Inc., 2851 Junction Avenue, San Jose, CA 95134 and various unanticipated locations.

Salary Range:  $204,901 to $220,672 per year

Company Description  

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology