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Microprocessor Design Intern

Microprocessor Design Intern
by Admin on 02-27-2020 at 1:33 pm

Website Cadence

Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.

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To view the job application please visit cadence.wd1.myworkdayjobs.com.

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