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As a DFT engineer, you will collaborate in designing and developing solutions for our semiconductor portfolio. You will collaborate with the Package Team and the Backend Team to create complex DFT solutions that need to deal with high frequency signals, performance requirements and customer expectations.
What do we offer? Flexible work schedules, competitive pay, a highly learning environment, and opportunities for advancement. Come and join us in the beautiful city of Barcelona!. Candies, coffee and free spanish lessons included!. (Visa sponsorship if required)
Requirements
Experience with DFT techniques applied in multiprocessor SoCs using DVFS methods
Experience with at least one of the leading EDA tools for DFT (Tessent, TestMax, Modus)
Proficiency of applying DFT already on RTL level
Experience with high frequency designs
Understanding of SoC RTL designs written in SystemVerilog, Verilog or VHDL
Experience with JTAG applied in multiprocessor SoC environment
Experience with application of the IJTAG(IEEE 1687) and IEEE1500-2022
Experience with MBIST, LBIST, IOBIST and at speed test methods
Proficiency of the test pattern generation and validation for highest fault coverage requirement
Experience with Scan chain
Knowledge of scan compression
Experience with Timing and Timings Constraints
Experience with basic block level testing
Strong problem-solving skills and attention to detail
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