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Certus Semiconductor Banner
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Certus Semiconductor at the 2025 Design Automation Conference #62DAC

Certus Semiconductor at the 2025 Design Automation Conference #62DAC
by Daniel Nenni on 06-15-2025 at 10:00 am

Key Takeaways

  • Certus Semiconductor will exhibit at booth #1731 during DAC 2025 in San Francisco, showcasing its custom I/O and ESD solutions.
  • The company specializes in high-speed, multi-voltage I/O libraries that provide seamless integration for various high-performance interfaces.
  • Certus recently joined the TSMC Open Innovation Platform IP Alliance to enhance its technology application across TSMC's advanced process nodes.

62nd DAC SemiWiki

Certus Semiconductor Brings High-Performance Custom I/O and ESD IP to DAC 2025

Certus Semiconductor, a trusted leader in custom I/O and ESD solutions, will exhibit at booth #1731 during DAC 2025, June 23–27 in San Francisco. Known for its robust, customer-proven IP tailored for challenging applications, Certus will highlight its extensive portfolio of high-speed, multi-voltage, and specialty I/O libraries that deliver seamless integration and outstanding protection across advanced nodes.

With over 16 years of experience, Certus specializes in developing custom I/O and ESD solutions for a wide range of high-performance interfaces—WiFi, Cellular, HDMI, LVDS, USB, XAUI, and up to 256Gb SerDes—while supporting harsh environments like automotive, industrial, and aerospace.

Certus recently joined the TSMC Open Innovation Platform® (OIP) IP Alliance, enabling the company to apply its custom I/O and ESD technology to TSMC’s advanced process nodes and deliver optimized, foundry-aligned IP to a broader base of SoC developers.

At DAC 2025, Certus will demonstrate how its IP portfolio supports:

  • Multi-protocol and multi-voltage I/O libraries for simplified integration across a wide voltage and protocol range
  • Combo GPIOs supporting interfaces like I²C/I³C/SPI/LVCMOS/HSTL/SSTL/eMMC
  • High-voltage and ultra-high-voltage (10V, 20V+) ESD protection on low-voltage CMOS for analog, RF, and MEMS applications
  • Custom die-to-die and high-speed SerDes I/O solutions with industry-leading low capacitance and robust ESD performance
  • Radiation-hardened and automotive-grade solutions across process nodes from 180nm down to 12nm

Certus’s IP is designed for performance, reliability, and ease of use—backed by expert technical support and a deep understanding of customer integration needs. Whether you’re working on ultra-low-power sensor interfaces or high-speed SoC interconnects, Certus offers IP that’s built to meet your design challenges head-on.

Visit Certus at DAC 2025 (booth #1731) to see how their cutting-edge custom I/O and ESD solutions can streamline your next chip design.

Learn more at www.certus-semi.com

DAC registration is open.

Also Read:

EP177: The Certus Approach to Meeting the Challenges of I/O and ESD with Stephen Fairbanks

The Opportunity Costs of using foundry I/O vs. high-performance custom I/O Libraries

CEO Interview: Stephen Fairbanks of Certus Semiconductor

 

 

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