The original vision for Certus Semiconductor in 2008 was to leverage production I/O Libraries from more significant partners, starting with Freescale, and take it to smaller external customers for licensing. This IP was proven and validated, with an excellent silicon track record and big company support; in our minds, we thought, “What small company wouldn’t want to use it!” A year later, we had not sold a single I/O Library license.
Instead, every customer looked at the offerings and said, “This is not much different from the foundry IP, which is free, and despite a few minor advantages, we see no benefit in licensing it.” This could have been the end of our story and the original business model. Still, our customers were very good at pointing us toward our future business model with this final statement, “Now, if the IO had this feature or higher performance, then we would license it.”
Our vision of an IP company shifted, and we fine-tuned our core business, designing custom best-in-class, high-performance I/O libraries that meet or exceed our customer’s market needs. Custom design services and support were added to the mix, and over time our standard IP offerings grew to a significant library of leading IP.
Today we are firmly both an IP licensing company and a custom design services company. Still, the most popular I/O Libraries grow from our custom portfolio, offering features, benefits, and capabilities our customers want that do not exist anywhere else in the semiconductor industry.
When asked, “How do you compete against free IP?” about the foundry or freely available third-party I/O libraries, I respond, “Opportunity Cost.”
In economic theory, opportunity cost is the value of what you lose when choosing between two or more options. Ideally, when you decide, you feel your choice will have better results for you regardless of what you lose by not choosing the alternative.
Engineers are very good at understanding opportunity costs regarding I/O tradeoffs when it is quantifiable. They can quickly determine the specific benefits of a custom I/O when they consider it has lower power, freeing up their power budgets for other blocks; or smaller footprints where they can compare the cost of saved silicon area versus the licensing fees. Such metrics allow simple calculations to guide the decision to use free I/O libraries or purchase a custom I/O license.
Conversations with sales, marketing leads, and product architects are where the hidden, and many times more significant, opportunity cost discussions surrounding I/O libraries happen. They understand the subjective benefits of a custom I/O library better than the design engineers. For example, adding an additional I/O protocol to a bank of I/O may open a new market or industry for the product. If by licensing a custom I/O library, you can double or triple your available market space, is that not worth it? By choosing a free I/O library, what does the loss of that potential market cost you?
Discussing with a Marketing lead what we can do with an I/O design is always fun. As soon as you start to mention new features or electrical interfaces that can easily be added to a set of I/O’s, you can begin to see them get excited about potential new markets, potential new customers, and new business opportunities!
One of my favorite questions is, “If you had a wish list for this product’s I/O capability, what would it include?” There have been many situations where a program director or marketing lead begins mentioning a feature they wanted because they saw a market opportunity but didn’t think it possible. As soon as we offer to add it in, the excitement is real! Some of the best custom designs we have done in the past were built off of a wish list of features given to us by the customer, many times with features they didn’t think possible but also features we wouldn’t have considered adding without their input.
Personal favorites of such collaborative designs are our 12V-30V interfaces in standard 40nm and 28nm low voltage CMOS processes, with no special masks, used for MEM’s and RF products. Additional fun examples are precision tristate-able PWM GPIOs and a specialty die-to-die low-power high-speed interface for MCMs.
Very few areas of chip design can enable new markets, and unique design socket wins, then I/O features. I/O design flexibility and options directly impact the variety of systems and market a part can be sold into. By allowing our team to collaborate with our customers’ marketing leads, we have been lucky to design many fascinating libraries for the industries.
At a conference in 2017, I gave a presentation titled “Fear not to Customize.” In that presentation, I explored several examples of how I/O custom features enabled our customers to leverage new opportunities, grow their markets, and expand their design wins. The principles of that presentation are still valid today. The last statement is one of my favorites, “Fear not to customize, instead let your competitors fear it.”
I still stand by that belief, telling my customers always to be bold and open to discussing with us or requesting custom I/O features. In many cases, we have already implemented that feature in a different node—the only fear they should have ar the opportunity costs of not customizing. Product architects and marketing must dream big and consider any design requests that enable new markets and opportunities and expand product impacts on the industry, even if those features seem implausible. We never know what unique products will come from such collaborations and dreams.
Certus Semiconductor will be present at DAC 2023, so you’ll have an opportunity to learn more about the opportunity costs of using foundry I/O versus high-performance I/O libraries. More importantly, you’ll have the chance to brainstorm with us new ideas about how a unique I/O design could reimagine your product and your market.