WP_Term Object
(
    [term_id] => 13
    [name] => Arm
    [slug] => arm
    [term_group] => 0
    [term_taxonomy_id] => 13
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 393
    [filter] => raw
    [cat_ID] => 13
    [category_count] => 393
    [category_description] => 
    [cat_name] => Arm
    [category_nicename] => arm
    [category_parent] => 178
)
            
Mobile Unleashed Banner SemiWiki
WP_Term Object
(
    [term_id] => 13
    [name] => Arm
    [slug] => arm
    [term_group] => 0
    [term_taxonomy_id] => 13
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 393
    [filter] => raw
    [cat_ID] => 13
    [category_count] => 393
    [category_description] => 
    [cat_name] => Arm
    [category_nicename] => arm
    [category_parent] => 178
)

Next Book Signing: Linley Processor Conference 2016!

Next Book Signing: Linley Processor Conference 2016!
by Daniel Nenni on 09-20-2016 at 12:00 pm

 It is a busy month for book signings but it is a pleasure to do it for the greater good of the semiconductor industry. It really is an honor to meet the people who keep our electronic devices on the leading edge of technology, absolutely.

The Linley Processor Conference is on September 27[SUP]th[/SUP]and 28[SUP]th[/SUP] at the Hyatt Regency Hotel in Santa Clara, right across the street from Levi Stadium for you sports fans. This is an in-depth embedded processor conference for communications, IoT, and advanced automotive systems.
Here are the keynotes:

Day One – September 27
Specialization Drives Processor Innovation
Linley Gwennap, Principal Analyst, The Linley Group

Day Two – September 28
How Virtualization is Changing Networking
Bruce Davie, CTP Networking, VMware

I’m sure we all know Linley so let’s check Bruce out:

Bruce Davie is CTO for Networking at VMware, and a Principal Engineer in the Networking and Security BU. He joined VMware as part of the Nicira acquisition, and focuses on network virtualization. He has over 25 years of networking industry experience, and was a Cisco Fellow prior to joining Nicira. At Cisco, he worked closely with leading service providers to enhance the capabilities of their networks. He led the team that developed multi-protocol label switching (MPLS) and contributed to the standards on IP quality of service. He has written over a dozen Internet RFCs and several networking textbooks. Bruce received his Ph. D. in computer science from the University of Edinburgh in 1988 and is an ACM Fellow.

SemiWiki bloggers Tom Simon, Don Dingee, and I will be covering this event so stay tuned for a more in-depth look at some of the presentations. In fact, quite a few of the companies SemiWiki has worked with over the years are presenting:

Session 1: IoT Edge
Intelligent edge devices create a buffer between numerous IoT clients and the rest of the Internet. To minimize the cost and power consumption of client devices, these IoT edge systems may offload complex protocols such as security. This session, moderated by The Linley Group senior analyst Loyd Case, will discuss potential threats to IoT security and provide hardware and software solutions to defend against these threats.

Protecting IoT Edge Devices from Malicious Physical and Software Attacks

Fergus Casey, Senior R&D Manager, ARC Processors, Synopsys

Session 5: SoC Connectivity

The number of IP blocks in a processor continues to rise. Many of these blocks perform some sort of processing, including CPUs, GPUs, DSPs, and image processors (ISPs). The newest trend is to connect these heterogeneous IP cores using a cache-coherent interconnect, simplifying data sharing. This session, moderated by The Linley Group senior analyst Tom Halfhill, will discuss network-on-a-chip (NoC) and other interconnect IP for complex SoC designs.

Building More Powerful Infrastructure SoCs from Edge to Cloud
Jeff Defilippi, Senior Product Manager, ARM

Coherency: The New Normal in SoCs
Anush Mohandass, Vice President, Marketing and Business Development, NetSpeed Systems

Implementing Cache-Coherent Hardware Acceleration for ADAS and Machine Learning
Matthew Mangan, Corporate Applications Engineer, Arteris

Session 9: Automotive and Vision
Advanced driver assistance systems (ADAS) are evolving from delivering hazard warnings, to active collision-avoidance, to fully autonomous driving. Specialized computer-vision IP cores coupled with deep-learning processors will provide the eyes and brains for future smart cars. This session, moderated by Mike Demler, senior analyst at The Linley Group, discusses new IP and SoC architectures for ADAS and other automotive applications.

A Neural-Network Oriented Vision DSP with Customized Hardware and Software Framework

Liran Bar, Director of Product Marketing, CEVA

High-Performance Vision Processors for HD Resolutions at Embedded Power Levels
Mike Thompson, Sr. Product Marketing Manager, ARC Processors, Synopsys

As Embedded Floating Point Becomes Ubiquitous, What Are Your Options?

Dror Maydan, Senior Group Director, Tensilica Software Group, Cadence

Following the sessions is a Q&A which is definitely worth your time. For more information: Linley Processor Conference 2016

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.