VSD is ready to create New History In Open-Source Hardware Industry
4 power packed Cloud Lab Tutorials for learner and experimenters'
LIVE online conference with Experts talk on Semiconductor Workforce Development
Showcase VSD Student Community 1st Tapeout
Ever looked at the complexity of duplicating your EDA workflows to run in the cloud? Is your CFO worried about running up huge bills for using the cloud? Want to …
Traditional coverage-based verification methods are no longer sufficient to verify complex SoCs integrating many processor cores and IP subsystems. To conquer the verification challenge of complex SoCs, companies are shifting …
Continue reading "Exploring a Software First Approach to Avoid SoC Re-spins"
The hardware/software interface, or HSI is the critical piece of technology that allows software to communicate with the hardware it’s controlling. With all the dedicated processors in most designs today, …
Continue reading "Three Perspectives on the Hardware/Software Interface – Who’s Right?"
At Veriest, we believe in knowledge sharing. In our recent meetup events, hundreds of professionals from 20+ different countries gathered to listen to different industry experts from companies such as …
Wednesday, March 9, 2022 | 10-10:45 a.m. PST Complex bus protocols, increased on-chip functionalities, coupled with limited shared I/O resources, result in complex wiring connections in SoCs with numerous muxing …
• Do you need to estimate the power advantage of implementing an AI algorithm on an accelerator? • Do you need to size the AI accelerator for existing and future …
Continue reading "Balancing Performance and Power in adding AI Accelerators to System-on-Chip (SoC)"
About this talk In specifying the features, functions, and requirements of a main processor and AI accelerator (NPU), system engineers and chip architects often don't consider use cases. In this …
Continue reading "Important Considerations for Specifying a Main Processor and AI Accelerator"
Date / Time: Thursday, March 31, 2022, 11:00 a.m. New York / 4:00 p.m. London Overview: sponsored by Especially inside the large data centers that underpin today’s cloud and internet infrastructure, …
Continue reading "Electronic and photonic building blocks for high-speed wireline transceivers"
Advanced semiconductor nanometer technology nodes, together with smart IC design applications enable today very complex and powerful systems for communication, automotive, data transmission, AI, IoT, medical, industry, energy harvesting, and …
Continue reading "WEBINAR: Simulate Trimming for Circuit Quality of Smart IC Design"
Thursday, May 12, 2022 | 10:00 - 11:00 a.m. Pacific During complex IP development, effort and time taken to perform a functional ECO is very high. It involves analysis and …
Continue reading "An Efficient Method to Perform Functional ECO Using Formality ECO"
Join us as one of our top engineers talks about interfacing DDR with programmable logic on the AMD - Xilinx Versal NoC. The webinar will include a live demo and …
Continue reading "Interfacing DDR with Programmable Logic on the Xilinx Versal NoC – Webinar"
