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Semiconductor Specialization Drives New Industry Structure

Semiconductor Specialization Drives New Industry Structure
by Daniel Nenni on 05-09-2018 at 7:00 am

21622-wally_rhines.jpgWhen traveling the world there are the things that you see and the people that you meet. I have been very fortunate to meet some of the most amazing people and one of those people is Dr. Walden Rhines. Wally spent the first half of his career in semiconductors at TI and the second half in EDA with Mentor Graphics which gives him a cyborg like quality, absolutely.

In fact, like a cyborg, Wally has terabytes of semiconductor design and manufacturing history stored in his data bank and readily shares it which is why I rarely miss one of his keynotes. And even if I do miss a keynote Wally will send me his slides which alone tells a good part of the story.

Wally’s next appearance is at the Mentor User2User Conference in Silicon Valley. User group meetings are unique in that you not only get a focused update on the vendor’s products, you also get to mingle with executives and other customers for the ultimate networking experience. There will also be free food and drink, you had me at free food.

User2User Silicon Valley 2018
Date: Tuesday, May 15, 2018
Location: Santa Clara Marriott – 2700 Mission College Blvd
More info: http://user2user.mentor.com/events/user2user-silicon-valley-2018-save-date/

Semiconductor Specialization Drives New Industry Structure
Walden C. Rhines, President and Chief Executive Officer of Mentor, a Siemens Business

Unlike industries that mature and consolidate as their growth rates slow, the semiconductor industry is following a new path. Through a series of consolidations and divestitures, major semiconductor companies are focusing their businesses on markets where they can be the dominant suppliers. This has led to unprecedented profitability for the most specialized semiconductor companies and has created fertile ground for new startups, which are rapidly increasing in number during recent quarters. Dr. Rhines will analyze the changing industry dynamics and provide suggestions for the continued success of the semiconductor industry.

The other keynote is by Hooman Moshar of Broadcom. Hooman started his career at Xerox in 1981 moving to Rockwell in 1994 and then Broadcom in 1997. Just imagine the stories he can tell…

Power, the Nemesis
Hooman Moshar, Vice President of Engineering, Broadcom Corporation

Over the course of past decade many factors have been influential in recognition of the fact that power consumption is rapidly becoming the overriding limitation in developing cost effective products. This talk will give a high level overview of why power is a major obstacle, review the power issues surrounding development of cost sensitive consumer electronic products in bulk CMOS, and touch upon approaches taken to battle power.

After the keynotes there are 9 major technical tracks:

Questa Functional Verification
Learn about advanced Questa functional verification solutions. Representatives from companies like Synaptics, Rambus, Marvell Semiconductor, and Cypress Semiconductor will share their knowledge about:

  • Using formal-based, rule-driven specification generation for analog IP verification
  • Performing exhaustive secure IP verification with formal property checking analysis
  • Automatically validating clock domain crossing waivers
  • Simplifying parametric power-aware regression simulation

AMS Verification
Find out about real-World AMS Verification Techniques from companies that include STMicroelectronics, NVIDIA, Unisoc, Forza Silicon, and Silicon Creations. They will discuss:

  • Qualifying high-sigma designs using the Eldo Fast Fail Prob. methodology
  • Addressing the AMS verification challenges for GPU interface PHYs
  • Meeting the AMS challenges for advanced processes
  • Solving CMOS image sensor verification challenges for safety-critical applications
  • Designing for 7nm, low-power and low-jitter PLLs

Calibre Physical Verification
Join other physical verification peers to learn about advanced Calibre solutions. Speakers from Arm and GLOBALFOUNDRIES will examine:

  • Automatic waiver generation for memory array validation
  • Improving via strapping using Calibre PERC and YieldEnhancer
  • Customizing physical verification flows using Calibre interfaces

Calibre Circuit Verification
Advanced Calibre solutions for circuit verification is another track at U2U. Representatives from companies like Ostendo, Cisco, LG Electronics, and Rambus will share their insights about:

  • Using Calibre xACT 3D to generate RC parasitics for IP blocks
  • Driving parasitic accuracy at advanced nodes
  • A novel method to ensure LVS-clean layout for custom inductors
  • Performing static power analysis for robust power distribution using Calibre PERC

HLS & RTL/GL Low-Power
Industry users of high-level synthesis and RTL low-power design will discuss advanced Catapult solutions. These companies include Ostendo and Cisco who will share their knowledge about:

  • Employing PowerPro for addressing power reduction challenges
  • Using PowerPro for optimization in a tight schedule in vector-less mode
  • Building high-level synthesis accelerators for computer vision and machine/deep learning

Tanner EDA
Come hear from custom AMS IC design and verification experts about advanced Tanner EDA solutions. Companies such as SoftMEMS, Innotime, Microgen, Obsidian Technology, and Lewyn Consulting will share their knowledge about:

  • Designing new interposer technology
  • Designing and verifying MEMS energy harvesters
  • How Tanner productivity can be improved with customizations
  • A new paradigm for dimensionless deep-nanoscale ADC design

Tessent Silicon Test Solutions
Design for test (DFT) experts will discuss advanced Tessent solutions including Samsung Electronics, Qualcomm Technologies, Microsoft, Ambarella Corporation, and Broadcom. Topics include:

  • Using hierarchical DFT for multicore design complexity
  • Low pin count testing of a transceiver IC
  • Handling memory signals related to timing and power
  • Using the entire Tessent suite of tools for testing state of the art SoCs
  • Employing Tessent Shell for GHz-class IP cores

Veloce Emulation Platform
Join your emulation peers at this year’s Mentor User2User conference to learn about advanced Veloce solutions from companies like Cisco, AMD, and Starblaze, who will discuss:

  • Maximizing Veloce value for networking designs
  • Using multi-level modeling techniques for accelerating pre-silicon software
  • Shortening your firmware design schedule by combining ASIC simulation and the Veloce emulator

Xpedition High Density Advanced Packaging
Advanced packaging experts will delve into Mentor’s high-density advanced packaging (HDAP) solutions. Representatives from companies like TechSearch International, Amkor Technology, and Qualcomm will share their knowledge about:

  • Technology and trends in the HDAP industry
  • Bridging between chip design and wafer-level manufacturing with package assembly design kits
  • Managing connectivity of vertically integrated, multi-substrate heterogeneous packages

Customer session highlights…

Samsung: An Integrated Hybrid Emulation Environment for Power and Thermal Analysis
Samsung: Dealing with Growing Design Complexity: Hierarchical DFT for Multicore Design
GLOBALFOUNDRIES: Calibre PERC and YieldEnhancer (SmartFill) based Utility to Improve Via Strapping for GF7LP
ST Microelectronics:Using Calibre Interfaces to Customize Physical Verification Flows for Advanced and Mature Node PDKs

Qualcomm: Connectivity Management of Vertically Integrated Multi-Substrate Heterogeneous Packages
Arm:Arm Physical Design Using Calibre xACT 3D

Cisco: RTL Power Optimization on a Tight Schedule: Powerpro in Vector-Less Mode
Marvell: How to Automatically Validate Your CDC Waivers Are Legit
Microsoft: Energy minimization in Depth Sensors
Microgen: Design of MEMS Energy Harvester using Tanner EDA

I hope to see you there!

Upcoming Worldwide User2User events:
User2User India – May 24th, 2018
User2User Europe – November 26th, 2018

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