Synopsys Expands Optical Interfaces at DesignCon

The exponential growth of cloud data centers is well-known. Driven by the demands of massive applications like generative AI, state-of-the-art data centers present substantial challenges in terms of power consumption. And AI is poised to drive a 160% increase in data center power demand while also increasing demands on storage and communication efficiency, throughput and latency. Cisco has estimated that ASIC SerDes power consumption has increased 25X over the past decade or so. Something needs to change.

The core communication method for these new data centers is based on optical networking. At the recent DesignCon, Synopsys focused on how to reduce power in data center comms, offering insights, strategies and real solutions. The company is working on an innovative new approach to optical communications that essentially reduces complexity to improve power and latency. There was a presentation on this topic and a live demonstration. I’ll provide some details on what Synopsys presented and demonstrated at DesignCon. I also had a chance to speak live with the presenter to get some of the backstory. Let’s examine how Synopsys expands optical interfaces at DesignCon.

The Presentation

Priyank Shukla, product line director for HPC IP at Synopsys presented Linear Eletro-Optical Interfaces: What, Why, When, and How? in the Chiphead Theater at DesignCon. Priyank is responsible for the deployment of Synopsys’ High Speed SerDes IP in complex SoCs. He has broad experience in analog, mixed-signal design with strong focus on high performance compute SoCs. He actively contributes as an IEEE802.3 voter, playing a pivotal role in shaping industry standards. A graduate of IIT Madras, Priyank has a US patent on low power RTC design.

Priyank described some compelling trends. He cited the 160% increase in data center power demand statistic. A key contributor to this is data communications. He explained that interconnects contribute about 27% of total data center power and interconnect power has increased 46x from 2010 to 2024. To complete the picture, he discussed the trends in how data is communicated. In a word, it’s done with light.

Optical interconnects are becoming crucial in data centers as they address the limitations of electrical copper interconnects in high data rate environments approaching 224 Gbps, where copper’s effectiveness diminishes. This creates a need for denser interconnect networks, which in turn increases power consumption. Optical solutions, however, can extend reach and offer scalability in data center topologies. The industry is moving towards optical interconnects to reduce latency and signal integrity issues, which helps with data center expansion.

So, the question is how to reduce the power demands of optical networking interfaces. Priyank described a direct drive/linear interface to meet this challenge. The term “less is more” comes to mind. A conventional optical interface typically has re-timer logic and a DSP to facilitate reliable communication. These items add parts count, size, cost, and power. It turns out the PHY on the transmission end can do more in advanced nodes.

Priyank explained that the switch ASIC’s PHY can directly drive an optical engine on a pluggable module. This optical engine does not include re-timers or DSPs. It does the job with linear amplifiers. This streamlined approach leads to a more compact and efficient design, making the system less complex and highly functional. The figure below illustrates what this new and simplified architecture looks like.

Implementing an approach like this can certainly be done if you’re designing the complete system and all of its components. This is not the case for the companies building massive data centers. These organizations rely on a worldwide supply chain to deliver the required components. So predictable interoperability between vendors to deliver this new capability is required. The next two sections of this post will look at this challenge.

The Demonstration

Developing the specifications required to ensure interoperability between vendors for any complex design is daunting. That is certainly true for linear optical interfaces. I’ll get to some details on that in a moment. But first, let’s look at the proof points that are already available. Synopsys has been demonstrating examples of how its IP works with other vendor’s technology for a while.

At ECOC 2023, Synopsys, in collaboration with OpenLight, a photonics venture formed with Juniper Networks, demonstrated the optical eye performance of a linear electrical-optical-electrical link transceiver. At DesignCon, Synopsys demonstrated its 112G Ethernet PHY IP enabling a linear pluggable optics (LPO) module diagnostic with TeraSignal’s ultra-low power linear driver – the industry’s first optical diagnostic interoperability at 112Gbps. 

Using a digital eye monitor, the transmitted signal was captured and analyzed and then settings were updated to minimize errors. It was shown that the Synopsys 112G Ethernet PHY IP receiver equalizes the incoming signal and achieves a near-zero bit error rate, highlighting its reliability and high performance in data transmission. Below is a photo of the demonstration hardware.

The Backstory

I had the opportunity to speak with Priyank Shukla recently. We discussed his presentation at DesignCon and Priyank provided a lot of color regarding what will be needed to make the new direct drive/linear interface broadly available. To achieve this goal, standards will need to be developed regarding how the pieces work together and test equipment and software will need to be built to verify compliance. 

This is a complex process, but the payoff is substantial when you consider the power crisis currently facing large data center build out. Priyank described the OIF 112G-Linear Optical Drive Standard effort that aims to define the electrical standards to ensure linear interoperability. Priyank went on to explain that there will be a need to measure photonic parameters to verify compliance, and a different type of test equipment will be needed to achieve this goal. This represents new investment and opens new markets for test and measurement vendors.

Priyank described some of the new parameters being defined by OIF to validate compliance. These include voltage modulation amplitude (VMA) and electrical eye closure quaternary (EECQ). These are new measurements that are under development. It is expected the standard will be ready later in 2025, so the required test equipment and software needed to measure these parameters is also under development.  Achieving mainstream deployment of direct drive/linear interfaces has brought many parts of the supply chain together.

Beyond 112G, Priyank also described work on a 224G standard. Achieving a direct drive/linear interface at this speed is more difficult and will require yet more innovation and new standards. And beyond these standards, Priyank explained that the PCI SIG is also working on optimized interfaces for PCIe.

My discussion with Priyank provided more detail regarding the complexity of this new interface and why it is indeed worth the effort. I got a better appreciation for the importance of the Synopsys IP and the company’s efforts to collaborate across the ecosystem to make the vision a reality.

To Learn More

TeraSignal issued a press release describing more details about the DesignCon demo. It is entitled, TeraSignal Demonstrates Interoperability with Synopsys 112G Ethernet PHY IP for High-Speed Linear Optics Connectivity and you can read the release here.

You can also learn more about direct-drive electro-optical interfaces from this informative technical bulletin.

And if you missed DesignCon, Synopsys will be showing the TeraSignal demo at the upcoming Optical Fiber Communications Conference and Exhibition (OFC), to be held in early April at Moscone Center in San Francisco. You can find Synopsys in booth 2818.

And that’s how Synopsys expands optical interfaces at DesignCon.