
On July 9, 2025, Vikram Bhatia, head of product management for Synopsys’ cloud platform, and Sashi Obilisetty, his R&D engineering counterpart, presented a DACtv session on Synopsys FlexEDA, as seen in the YouTube video. Drawing from three and a half years of data, the session showcased how this cloud-based, pay-per-use EDA platform has slashed tape-out times by months, offering scalable, cost-efficient solutions for the semiconductor industry’s escalating design challenges.
FlexEDA addresses the growing complexity of modern chip designs, with systems-on-chip (SoCs) now featuring billions of transistors. Traditional EDA workflows, constrained by on-premises infrastructure, struggle with compute-intensive tasks like simulation, verification, and physical design. FlexEDA leverages cloud scalability to provide on-demand compute resources, enabling companies to burst workloads during peak design phases. Bhatia highlighted that customers, ranging from startups to tier-one semiconductor firms, have reduced tape-out schedules by several months, with some achieving up to 30% faster design cycles through FlexEDA’s elastic compute capabilities.
The platform’s pay-per-use model is a game-changer, particularly for batch-oriented tools like VCS, PrimeTime, PrimeLib, PrimeSim, and StarRC. Unlike traditional per-user licensing, which often underutilizes interactive tools with GUIs, FlexEDA charges based on actual usage, measured precisely for compute-heavy batch jobs. This ensures cost neutrality, as Bhatia emphasized, aligning expenses with project needs. For example, running hundreds or thousands of licenses for verification or timing analysis becomes affordable, as customers only pay for resources consumed. This model optimizes engineering budgets and time, especially for smaller firms with limited capital.
Sashi detailed the technical underpinnings, noting FlexEDA’s integration with cloud-native infrastructure. The platform supports hybrid workflows, seamlessly connecting on-premises systems with cloud resources via tools like Synopsys’ Design Compiler and Fusion Compiler. AI and machine learning enhance FlexEDA’s capabilities, optimizing tasks like place-and-route and power analysis. For instance, AI-driven algorithms predict optimal design configurations, reducing iterations and improving power-performance-area (PPA) metrics by 10-15%. The platform’s robustness stems from extensive testing and customer data, ensuring reliability across diverse workloads, from AI accelerators to automotive chips.
Addressing an audience question on cost management, Bhatia clarified that FlexEDA’s pricing is designed to be neutral, avoiding overcharges while ensuring Synopsys remains financially sustainable. Only flagship tools suited for batch processing are included in the pay-per-use model, as converting interactive tools is engineering-intensive and less scalable. This strategic focus maximizes ROI for customers running high-volume simulations, a critical need as chip complexity grows with AI and 5G applications.
The session underscored broader industry trends. With the semiconductor market projected to hit $1 trillion by 2030, tools like FlexEDA are vital for managing complexity and meeting time-to-market demands. The cloud model mitigates compute shortages, a bottleneck for traditional workflows, while supporting sustainability by optimizing resource use. Bhatia invited attendees to explore details at synopsys.com/cloud, emphasizing the platform’s role in driving innovation.
FlexEDA’s success reflects a shift toward cloud-native EDA, enabling scalable, efficient, and cost-effective design processes. By leveraging cloud infrastructure and AI, Synopsys empowers designers to tackle modern challenges, ensuring the industry remains agile in an AI-driven era. The session concluded with a call to join the next DAC exhibitor forum, signaling Synopsys’ commitment to advancing chip design innovation.
Also Read:
Perforce and Siemens: A Strategic Partnership for Digital Threads in EDA
AI-Driven Chip Design: Navigating the Future
IBM Cloud: Enabling World-Class EDA Workflows
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